Kenji Yoshida

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Cupertino, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Isolated circuit formed during back end of line process
- Patent number 10,679,986
- Issue date Jun 9, 2020
- RENESAS ELECTRONICS AMERICA INC.
- Kenji Yoshida
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated circuit formed during back end of line process
- Patent number 10,147,722
- Issue date Dec 4, 2018
- Renesas Electronics America Inc.
- Kenji Yoshida
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High voltage generation method at battery system
- Patent number 9,711,984
- Issue date Jul 18, 2017
- Renesas Electronics America Inc.
- Kenji Yoshida
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER

Patents Applicationslast 30 patents

Information Patent Application
ISOLATED CIRCUIT FORMED DURING BACK END OF LINE PROCESS
- Publication number 20190103401
- Publication date Apr 4, 2019
- Renesas Electronics America Inc.
- Kenji Yoshida
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ISOLATED CIRCUIT FORMED DURING BACK END OF LINE PROCESS
- Publication number 20180047756
- Publication date Feb 15, 2018
- RENESAS ELECTRONICS AMERICA INC.
- Kenji Yoshida
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
E-FUSE/SWITCH BY BACK END OF LINE (BEOL) PROCESS
- Publication number 20170207642
- Publication date Jul 20, 2017
- Tetsuo Sato
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
HIGH VOLTAGE GENERATION METHOD AT BATTERY SYSTEM
- Publication number 20160118825
- Publication date Apr 28, 2016
- RENESAS ELECTRONICS AMERICA INC.
- Kenji Yoshida
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER