Kennard Mark

Person

Crolles, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Method for manufacturing a thick epitaxial layer of gallium nitride...
- Patent number 9,093,271
- Issue date Jul 28, 2015
- Soitec
- David Schenk
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method for manufacturing a heterostructure aiming at reducing the t...
- Patent number 8,778,777
- Issue date Jul 15, 2014
- Soitec
- Mark Kennard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor heterostructure and method for forming same
- Patent number 8,084,784
- Issue date Dec 27, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Christophe Figuet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained layers within semiconductor buffer structures
- Patent number 7,825,401
- Issue date Nov 2, 2010
- ASM America, Inc.
- Nyles W. Cody
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor heterostructure and method for forming same
- Patent number 7,772,127
- Issue date Aug 10, 2010
- S.O.I. Tec Silicon on Insulator Technologies
- Christophe Figuet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained layers within semiconductor buffer structures
- Patent number 7,608,526
- Issue date Oct 27, 2009
- ASM America, Inc.
- Nyles W. Cody
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a wafer
- Patent number 7,572,331
- Issue date Aug 11, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a wafer
- Patent number 7,407,548
- Issue date Aug 5, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR MANUFACTURING A THICK EPTAXIAL LAYER OF GALLIUM NITRIDE...
- Publication number 20140327013
- Publication date Nov 6, 2014
- SOITEC
- David Schenk
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD FOR MANUFACTURING A HETEROSTRUCTURE AIMING AT REDUCING THE T...
- Publication number 20120100690
- Publication date Apr 26, 2012
- INSTITUTE OF MICROBIOLOGY, CHINESE ACADEMY OF SCIENCES
- Mark Kennard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Preparing a Surface of a Sapphire Substrate for Fabricating Heteros...
- Publication number 20120015497
- Publication date Jan 19, 2012
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR HETEROSTRUCTURE AND METHOD FOR FORMING SAME
- Publication number 20100264463
- Publication date Oct 21, 2010
- Christophe Figuet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAINED LAYERS WITHIN SEMICONDUCTOR BUFFER STRUCTURES
- Publication number 20100006893
- Publication date Jan 14, 2010
- ASM AMERICA, INC
- Nyles W. Cody
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Strained layers within semiconductor buffer structures
- Publication number 20080017952
- Publication date Jan 24, 2008
- ASM America, Inc.
- Nyles W. Cody
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor heterostructure and method for forming same
- Publication number 20070051975
- Publication date Mar 8, 2007
- Christophe Figuet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of manufacturing a wafer
- Publication number 20070000435
- Publication date Jan 4, 2007
- S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of manufacturing a wafer
- Publication number 20050188915
- Publication date Sep 1, 2005
- Konstantin Bourdelle
- H01 - BASIC ELECTRIC ELEMENTS

Kennard Mark

Person

Patents Grantslast 30 patents

Method for manufacturing a thick epitaxial layer of gallium nitride...

Method for manufacturing a heterostructure aiming at reducing the t...

Semiconductor heterostructure and method for forming same

Strained layers within semiconductor buffer structures

Semiconductor heterostructure and method for forming same

Strained layers within semiconductor buffer structures

Method of manufacturing a wafer

Method of manufacturing a wafer

Patents Applicationslast 30 patents

METHOD FOR MANUFACTURING A THICK EPTAXIAL LAYER OF GALLIUM NITRIDE...

METHOD FOR MANUFACTURING A HETEROSTRUCTURE AIMING AT REDUCING THE T...

Preparing a Surface of a Sapphire Substrate for Fabricating Heteros...

SEMICONDUCTOR HETEROSTRUCTURE AND METHOD FOR FORMING SAME

STRAINED LAYERS WITHIN SEMICONDUCTOR BUFFER STRUCTURES

Strained layers within semiconductor buffer structures

Semiconductor heterostructure and method for forming same

Method of manufacturing a wafer

Method of manufacturing a wafer