Kenneth Alan Dockser

Person

Cary, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Division and root computation with fast result formatting
- Patent number 9,753,694
- Issue date Sep 5, 2017
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for cache tag compression
- Patent number 9,514,061
- Issue date Dec 6, 2016
- QUALCOMM Incorporated
- Henry Arthur Pellerin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for selective renaming in a microprocessor
- Patent number 9,471,325
- Issue date Oct 18, 2016
- QUALCOMM Incorporated
- Anil Krishna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with a coprocessor having early access to not-yet issued...
- Patent number 9,304,774
- Issue date Apr 5, 2016
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid queue for storing instructions from fetch queue directly in...
- Patent number 9,164,772
- Issue date Oct 20, 2015
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlled-precision iterative arithmetic logic unit
- Patent number 9,146,706
- Issue date Sep 29, 2015
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software selectable adjustment of SIMD parallelism
- Patent number 8,799,627
- Issue date Aug 5, 2014
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating-point processor with reduced power requirements for select...
- Patent number 8,595,279
- Issue date Nov 26, 2013
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for executing processor instructions based on...
- Patent number 8,566,568
- Issue date Oct 22, 2013
- QUALCOMM Incorporated
- Gerald Paul Michalak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mode-based multiply-add recoding for denormal operands
- Patent number 8,447,800
- Issue date May 21, 2013
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector unit in a processor enabled to replicate data on a first por...
- Patent number 8,200,945
- Issue date Jun 12, 2012
- International Business Machines Corporation
- Siddhartha Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software selectable adjustment of SIMD parallelism
- Patent number 8,122,231
- Issue date Feb 21, 2012
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pre-saturating fixed-point multiplier
- Patent number 8,082,287
- Issue date Dec 20, 2011
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mode-based multiply-add recoding for denormal operands
- Patent number 7,912,887
- Issue date Mar 22, 2011
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with automatic selection of processing parallelism m...
- Patent number 7,836,284
- Issue date Nov 16, 2010
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Vector execution unit to process a vector instruction by executing...
- Patent number 7,793,072
- Issue date Sep 7, 2010
- International Business Machines Corporation
- Kenneth Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latency insensitive FIFO signaling protocol
- Patent number 7,725,625
- Issue date May 25, 2010
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating-point processor with selectable subprecision
- Patent number 7,725,519
- Issue date May 25, 2010
- Qualcom Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software selectable adjustment of SIMD parallelism
- Patent number 7,694,114
- Issue date Apr 6, 2010
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method wherein conditional instructions unconditionally...
- Patent number 7,624,256
- Issue date Nov 24, 2009
- QUALCOMM Incorporated
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latency insensitive FIFO signaling protocol
- Patent number 7,454,538
- Issue date Nov 18, 2008
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for reducing power consumption of a programmable...
- Patent number 7,386,747
- Issue date Jun 10, 2008
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
WRITE-ALLOCATION FOR A CACHE BASED ON EXECUTE PERMISSIONS
- Publication number 20170255569
- Publication date Sep 7, 2017
- QUALCOMM Incorporated
- Thomas Andrew SARTORIUS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CACHE TAG COMPRESSION
- Publication number 20160342530
- Publication date Nov 24, 2016
- QUALCOMM Incorporated
- Henry Arthur PELLERIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH PERFORMANCE DIVISION AND ROOT COMPUTATION UNIT
- Publication number 20160313976
- Publication date Oct 27, 2016
- QUALCOMM Incorporated
- Michael Thomas DIBRINO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIVISION AND ROOT COMPUTATION WITH FAST RESULT FORMATTING
- Publication number 20160313977
- Publication date Oct 27, 2016
- QUALCOMM Incorporated
- Kenneth Alan DOCKSER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SELECTIVE RENAMING IN A MICROPROCESSOR
- Publication number 20150019843
- Publication date Jan 15, 2015
- QUALCOMM Incorporated
- Anil KRISHNA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZING PERFORMANCE FOR CONTEXT-DEPENDENT INSTRUCTIONS
- Publication number 20140281405
- Publication date Sep 18, 2014
- Daren Eugene Streett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLOATING-POINT ADDER WITH OPERAND SHIFTING BASED ON A PREDICTED EXP...
- Publication number 20130218938
- Publication date Aug 22, 2013
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with Hazard Tracking Employing Register Range Compares
- Publication number 20130173886
- Publication date Jul 4, 2013
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with a Coprocessor having Early Access to Not-Yet Issued...
- Publication number 20120204005
- Publication date Aug 9, 2012
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with a Hybrid Instruction Queue with Instruction Elaborat...
- Publication number 20120204008
- Publication date Aug 9, 2012
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with a Hybrid Instruction Queue
- Publication number 20120204004
- Publication date Aug 9, 2012
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Software Selectable Adjustment of SIMD Parallelism
- Publication number 20120117358
- Publication date May 10, 2012
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Apparatus for a Read, Merge and Write Register File
- Publication number 20120110037
- Publication date May 3, 2012
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODE-BASED MULTIPLY-ADD RECODING FOR DENORMAL OPERANDS
- Publication number 20110137970
- Publication date Jun 9, 2011
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Software Selectable Adjustment of SIMD Parallelism
- Publication number 20100146315
- Publication date Jun 10, 2010
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Latency Insensitive FIFO Signaling Protocol
- Publication number 20080281996
- Publication date Nov 13, 2008
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Executing Processor Instructions Based on...
- Publication number 20080046692
- Publication date Feb 21, 2008
- Gerald Paul Michalak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODE-BASED MULTIPLY-ADD RECODING FOR DENORMAL OPERANDS
- Publication number 20070266071
- Publication date Nov 15, 2007
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlled-Precision Iterative Arithmetic Logic Unit
- Publication number 20070260662
- Publication date Nov 8, 2007
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating-point processor with reduced power requirements for select...
- Publication number 20070203967
- Publication date Aug 30, 2007
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pre-saturating fixed-point multiplier
- Publication number 20070174379
- Publication date Jul 26, 2007
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating-point processor with selectable subprecision
- Publication number 20070078923
- Publication date Apr 5, 2007
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Software selectable adjustment of SIMD parallelism
- Publication number 20060282646
- Publication date Dec 14, 2006
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor with automatic selection of SIMD parallelism
- Publication number 20060282826
- Publication date Dec 14, 2006
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Latency insensitive FIFO signaling protocol
- Publication number 20060259669
- Publication date Nov 16, 2006
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Idle-element prediction circuitry and anti-thrashing logic
- Publication number 20060259791
- Publication date Nov 16, 2006
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method wherein conditional instructions unconditionally...
- Publication number 20060236078
- Publication date Oct 19, 2006
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Vector processor with data swap and replication
- Publication number 20050102487
- Publication date May 12, 2005
- Siddhartha Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with asymmetric SIMD functionality
- Publication number 20050097299
- Publication date May 5, 2005
- Kenneth Dockser
- G06 - COMPUTING CALCULATING COUNTING

Kenneth Alan Dockser

Person

Patents Grantslast 30 patents

Division and root computation with fast result formatting

Method and apparatus for cache tag compression

Method and apparatus for selective renaming in a microprocessor

Processor with a coprocessor having early access to not-yet issued...

Hybrid queue for storing instructions from fetch queue directly in...

Controlled-precision iterative arithmetic logic unit

Software selectable adjustment of SIMD parallelism

Floating-point processor with reduced power requirements for select...

Method and apparatus for executing processor instructions based on...

Mode-based multiply-add recoding for denormal operands

Vector unit in a processor enabled to replicate data on a first por...

Software selectable adjustment of SIMD parallelism

Pre-saturating fixed-point multiplier

Mode-based multiply-add recoding for denormal operands

Microprocessor with automatic selection of processing parallelism m...

Vector execution unit to process a vector instruction by executing...

Latency insensitive FIFO signaling protocol

Floating-point processor with selectable subprecision

Software selectable adjustment of SIMD parallelism

System and method wherein conditional instructions unconditionally...

Latency insensitive FIFO signaling protocol

Method and system for reducing power consumption of a programmable...

Patents Applicationslast 30 patents

WRITE-ALLOCATION FOR A CACHE BASED ON EXECUTE PERMISSIONS

METHOD AND APPARATUS FOR CACHE TAG COMPRESSION

HIGH PERFORMANCE DIVISION AND ROOT COMPUTATION UNIT

DIVISION AND ROOT COMPUTATION WITH FAST RESULT FORMATTING

METHOD AND APPARATUS FOR SELECTIVE RENAMING IN A MICROPROCESSOR

OPTIMIZING PERFORMANCE FOR CONTEXT-DEPENDENT INSTRUCTIONS

FLOATING-POINT ADDER WITH OPERAND SHIFTING BASED ON A PREDICTED EXP...

Processor with Hazard Tracking Employing Register Range Compares

Processor with a Coprocessor having Early Access to Not-Yet Issued...

Processor with a Hybrid Instruction Queue with Instruction Elaborat...

Processor with a Hybrid Instruction Queue

Software Selectable Adjustment of SIMD Parallelism

Methods and Apparatus for a Read, Merge and Write Register File

MODE-BASED MULTIPLY-ADD RECODING FOR DENORMAL OPERANDS

Software Selectable Adjustment of SIMD Parallelism

Latency Insensitive FIFO Signaling Protocol

Method and Apparatus for Executing Processor Instructions Based on...

MODE-BASED MULTIPLY-ADD RECODING FOR DENORMAL OPERANDS

Controlled-Precision Iterative Arithmetic Logic Unit

Floating-point processor with reduced power requirements for select...

Pre-saturating fixed-point multiplier

Floating-point processor with selectable subprecision

Software selectable adjustment of SIMD parallelism

Microprocessor with automatic selection of SIMD parallelism

Latency insensitive FIFO signaling protocol

Idle-element prediction circuitry and anti-thrashing logic

System and method wherein conditional instructions unconditionally...

Vector processor with data swap and replication

Processor with asymmetric SIMD functionality