Kenneth J. Newton

Person

McKinney, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reduction of punch-thru defects in damascene processing
- Patent number 7,727,885
- Issue date Jun 1, 2010
- Texas Instruments Incorporated
- Phillip Daniel Matz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of passivating and/or removing contaminants on a low-k diele...
- Patent number 7,087,518
- Issue date Aug 8, 2006
- Texas Instruments Incorporated
- David Gerald Farber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process flow for dual damescene interconnect structures
- Patent number 6,872,665
- Issue date Mar 29, 2005
- Texas Instruments Incorporated
- Francis G. Celii
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pre-pattern surface modification of low-k dielectrics
- Patent number 6,861,348
- Issue date Mar 1, 2005
- Texas Instruments Incorporated
- Brian K. Kirkpatrick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-situ plasma ash/treatment after via etch of low-k films for pois...
- Patent number 6,797,633
- Issue date Sep 28, 2004
- Texas Instruments Incorporated
- Ping Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming dual-damascene structure
- Patent number 6,774,031
- Issue date Aug 10, 2004
- Texas Instruments Incorporated
- Abbas Ali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming multiple damascene layers
- Patent number 6,723,636
- Issue date Apr 20, 2004
- Texas Instruments Incorporated
- Noel M. Russell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pre-pattern surface modification for low-k dielectrics using A H2 p...
- Patent number 6,720,247
- Issue date Apr 13, 2004
- Texas Instruments Incorporated
- Brian K. Kirkpatrick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Defect and etch rate control in trench etch for dual damascene patt...
- Patent number 6,455,411
- Issue date Sep 24, 2002
- Texas Instruments Incorporated
- Ping Jiang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Reduction of punch-thru defects in damascene processing
- Publication number 20080057711
- Publication date Mar 6, 2008
- Texas Instrumentd incorporated
- Phillip Daniel Matz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming dual-damascene structure
- Publication number 20040121581
- Publication date Jun 24, 2004
- Abbas Ali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of passivating and/or removing contaminants on a low-k diele...
- Publication number 20030224585
- Publication date Dec 4, 2003
- David Gerald Farber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for forming vias and trenches with controlled SiC etch rate...
- Publication number 20030181034
- Publication date Sep 25, 2003
- Ping Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of passivating and/or removing contaminants on a low-k diele...
- Publication number 20030170992
- Publication date Sep 11, 2003
- David Gerald Farber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Pre-pattern surface modification for low-k dielectrics
- Publication number 20020111037
- Publication date Aug 15, 2002
- Brian K. Kirkpatrick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Pre-pattern surface modification for low-k dielectrics using A H2 p...
- Publication number 20020111017
- Publication date Aug 15, 2002
- Brian K. Kirkpatrick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
In-situ plasma ash/treatment after via etch of low-k films for pois...
- Publication number 20020081855
- Publication date Jun 27, 2002
- Ping Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Defect and etch rate control in trench etch for dual damascene patt...
- Publication number 20020031906
- Publication date Mar 14, 2002
- Ping Jiang
- H01 - BASIC ELECTRIC ELEMENTS

Kenneth J. Newton

Person

Patents Grantslast 30 patents

Reduction of punch-thru defects in damascene processing

Method of passivating and/or removing contaminants on a low-k diele...

Process flow for dual damescene interconnect structures

Pre-pattern surface modification of low-k dielectrics

In-situ plasma ash/treatment after via etch of low-k films for pois...

Method of forming dual-damascene structure

Methods for forming multiple damascene layers

Pre-pattern surface modification for low-k dielectrics using A H2 p...

Defect and etch rate control in trench etch for dual damascene patt...

Patents Applicationslast 30 patents

Reduction of punch-thru defects in damascene processing

Method of forming dual-damascene structure

Method of passivating and/or removing contaminants on a low-k diele...

Methods for forming vias and trenches with controlled SiC etch rate...

Method of passivating and/or removing contaminants on a low-k diele...

Pre-pattern surface modification for low-k dielectrics

Pre-pattern surface modification for low-k dielectrics using A H2 p...

In-situ plasma ash/treatment after via etch of low-k films for pois...

Defect and etch rate control in trench etch for dual damascene patt...