Kenneth J. Reyer

Person

Stormville, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Voltage bitline high (VBLH) regulation for computer memory
- Patent number 10,930,339
- Issue date Feb 23, 2021
- International Business Machines Corporation
- Gregory J. Fredeman
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic high voltage driver with adjustable clamped output level
- Patent number 9,748,958
- Issue date Aug 29, 2017
- International Business Machines Corporation
- Gregory J. Fredeman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Gated-feedback sense amplifier for single-ended local bit-line memo...
- Patent number 9,224,437
- Issue date Dec 29, 2015
- GLOBALFOUNDRIES Inc.
- John E. Barth
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic cascode-managed high-voltage word-line driver circuit
- Patent number 9,053,770
- Issue date Jun 9, 2015
- International Business Machines Corporation
- Gregory J. Fredeman
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic cascode-managed high-voltage word-line driver circuit
- Patent number 9,025,403
- Issue date May 5, 2015
- International Business Machines Corporation
- Gregory J. Fredeman
- G11 - INFORMATION STORAGE
Information Patent Grant
Write control method for a memory array configured with multiple me...
- Patent number 7,688,650
- Issue date Mar 30, 2010
- International Business Machines Corporation
- John D. Davis
- G11 - INFORMATION STORAGE
Information Patent Grant
Write control circuitry and method for a memory array configured wi...
- Patent number 7,471,590
- Issue date Dec 30, 2008
- International Business Machines Corporation
- John D. Davis
- G11 - INFORMATION STORAGE
Information Patent Grant
ABIST data compression and serialization for memory built-in self t...
- Patent number 7,380,191
- Issue date May 27, 2008
- International Business Machines Corporation
- James W. Dawson
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock control method and apparatus for a memory array
- Patent number 7,299,374
- Issue date Nov 20, 2007
- International Business Machines Corporation
- James W. Dawson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write control circuitry and method for a memory array configured wi...
- Patent number 7,283,417
- Issue date Oct 16, 2007
- International Business Machines Corporation
- John D. Davis
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast pulse powered NOR decode apparatus for semiconductor devices
- Patent number 7,176,725
- Issue date Feb 13, 2007
- International Business Machines Corporation
- James W. Dawson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast pulse powered NOR decode apparatus with pulse stretching and r...
- Patent number 7,170,320
- Issue date Jan 30, 2007
- International Business Machines Corporation
- James W. Dawson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High density bitline selection apparatus for semiconductor memory d...
- Patent number 7,099,206
- Issue date Aug 29, 2006
- International Business Machines Corporation
- James W. Dawson
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for implementing multiple memory redundancy wi...
- Patent number 7,068,554
- Issue date Jun 27, 2006
- International Business Machines Corporation
- James W. Dawson
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for implementing multiple column redundancy fo...
- Patent number 7,064,990
- Issue date Jun 20, 2006
- International Business Machines Corporation
- James W. Dawson
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DYNAMIC HIGH VOLTAGE DRIVER WITH ADJUSTABLE CLAMPED OUTPUT LEVEL
- Publication number 20160352336
- Publication date Dec 1, 2016
- International Business Machines Corporation
- Gregory J. Fredeman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DYNAMIC CASCODE-MANAGED HIGH-VOLTAGE WORD-LINE DRIVER CIRCUIT
- Publication number 20150162059
- Publication date Jun 11, 2015
- International Business Machines Corporation
- Gregory J. Fredeman
- G11 - INFORMATION STORAGE
Information Patent Application
GATED-FEEDBACK SENSE AMPLIFIER FOR SINGLE-ENDED LOCAL BIT-LINE MEMO...
- Publication number 20150117120
- Publication date Apr 30, 2015
- International Business Machines Corporation
- John E. Barth
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE CONTROL METHOD FOR A MEMORY ARRAY CONFIGURED WITH MULTIPLE ME...
- Publication number 20080247245
- Publication date Oct 9, 2008
- International Business Machines Corporation
- John D. Davis
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK CONTROL METHOD AND APPARATUS FOR A MEMORY ARRAY
- Publication number 20080028255
- Publication date Jan 31, 2008
- International Business Machines Corporation
- James W. Dawson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE CONTROL CIRCUITRY AND METHOD FOR A MEMORY ARRAY CONFIGURED WI...
- Publication number 20070237020
- Publication date Oct 11, 2007
- International Business Machines Corporation
- John D. Davis
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for SRAM decoding with single signal synchroni...
- Publication number 20060181950
- Publication date Aug 17, 2006
- International Business Machines Corporation
- John D. Davis
- G11 - INFORMATION STORAGE
Information Patent Application
Fast pulse powered NOR decode apparatus with pulse stretching and r...
- Publication number 20060176194
- Publication date Aug 10, 2006
- International Business Machines Corporation
- James W. Dawson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Write control circuitry and method for a memory array configured wi...
- Publication number 20060176756
- Publication date Aug 10, 2006
- International Business Machines Corporation
- John D. Davis
- G11 - INFORMATION STORAGE
Information Patent Application
ABIST data compression and serialization for memory built-in self t...
- Publication number 20060179377
- Publication date Aug 10, 2006
- International Business Machines Corporation
- James W. Dawson
- G11 - INFORMATION STORAGE
Information Patent Application
Fast pulse powered NOR decode apparatus for semiconductor devices
- Publication number 20060176081
- Publication date Aug 10, 2006
- International Business Machines Corporation
- James W. Dawson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clock control method and apparatus for a memory array
- Publication number 20060174153
- Publication date Aug 3, 2006
- International Business Machines Corporation
- James W. Dawson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High density bitline selection apparatus for semiconductor memory d...
- Publication number 20060171215
- Publication date Aug 3, 2006
- International Business Machines Corporation
- James W. Dawson
- G11 - INFORMATION STORAGE
Information Patent Application
Body contact layout for semiconductor-on-insulator devices
- Publication number 20050127441
- Publication date Jun 16, 2005
- International Business Machines Corporation
- Donald W. Plass
- H01 - BASIC ELECTRIC ELEMENTS

Kenneth J. Reyer

Person

Patents Grantslast 30 patents

Voltage bitline high (VBLH) regulation for computer memory

Dynamic high voltage driver with adjustable clamped output level

Gated-feedback sense amplifier for single-ended local bit-line memo...

Dynamic cascode-managed high-voltage word-line driver circuit

Dynamic cascode-managed high-voltage word-line driver circuit

Write control method for a memory array configured with multiple me...

Write control circuitry and method for a memory array configured wi...

ABIST data compression and serialization for memory built-in self t...

Clock control method and apparatus for a memory array

Write control circuitry and method for a memory array configured wi...

Fast pulse powered NOR decode apparatus for semiconductor devices

Fast pulse powered NOR decode apparatus with pulse stretching and r...

High density bitline selection apparatus for semiconductor memory d...

Apparatus and method for implementing multiple memory redundancy wi...

Method and apparatus for implementing multiple column redundancy fo...

Patents Applicationslast 30 patents

DYNAMIC HIGH VOLTAGE DRIVER WITH ADJUSTABLE CLAMPED OUTPUT LEVEL

DYNAMIC CASCODE-MANAGED HIGH-VOLTAGE WORD-LINE DRIVER CIRCUIT

GATED-FEEDBACK SENSE AMPLIFIER FOR SINGLE-ENDED LOCAL BIT-LINE MEMO...

WRITE CONTROL METHOD FOR A MEMORY ARRAY CONFIGURED WITH MULTIPLE ME...

CLOCK CONTROL METHOD AND APPARATUS FOR A MEMORY ARRAY

WRITE CONTROL CIRCUITRY AND METHOD FOR A MEMORY ARRAY CONFIGURED WI...

Apparatus and method for SRAM decoding with single signal synchroni...

Fast pulse powered NOR decode apparatus with pulse stretching and r...

Write control circuitry and method for a memory array configured wi...

ABIST data compression and serialization for memory built-in self t...

Fast pulse powered NOR decode apparatus for semiconductor devices

Clock control method and apparatus for a memory array

High density bitline selection apparatus for semiconductor memory d...

Body contact layout for semiconductor-on-insulator devices