KENNETH L. WARD

Person

AUSTIN, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Completion mechanism for a microprocessor instruction completion table
- Patent number 11,366,671
- Issue date Jun 21, 2022
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor providing intelligent management of values buffered in ov...
- Patent number 11,327,757
- Issue date May 10, 2022
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Finish status reporting for a simultaneous multithreading processor...
- Patent number 11,269,647
- Issue date Mar 8, 2022
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Check pointing of accumulator register results in a microprocessor
- Patent number 11,119,772
- Issue date Sep 14, 2021
- International Business Machines Corporation
- Steven J Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Finish exception handling of an instruction completion table
- Patent number 11,086,630
- Issue date Aug 10, 2021
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prioritized instructions in an instruction completion table of a si...
- Patent number 11,068,274
- Issue date Jul 20, 2021
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-demand multi-tiered hang buster for SMT microprocessor
- Patent number 11,030,018
- Issue date Jun 8, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction completion table with ready-to-complete vector
- Patent number 10,977,034
- Issue date Apr 13, 2021
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculatively releasing store data before store instruction complet...
- Patent number 10,929,144
- Issue date Feb 23, 2021
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative execution of both paths of a weakly predicted branch in...
- Patent number 10,901,743
- Issue date Jan 26, 2021
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dispatching, allocating, and deallocating instructions with real/vi...
- Patent number 10,877,763
- Issue date Dec 29, 2020
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Most favored branch issue
- Patent number 10,831,492
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for completing atomic instructions in a microprocessor
- Patent number 10,831,489
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction completion table containing entries that share instruct...
- Patent number 10,761,856
- Issue date Sep 1, 2020
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Completion mechanism for a microprocessor instruction completion table
- Patent number 10,725,786
- Issue date Jul 28, 2020
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to stop completions using stop codes in an instruction co...
- Patent number 10,713,057
- Issue date Jul 14, 2020
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficiently managing speculative finish tracking and error handling...
- Patent number 10,552,165
- Issue date Feb 4, 2020
- International Business Machines Corporation
- Susan E. Eisen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficiently managing speculative finish tracking and error handling...
- Patent number 10,423,423
- Issue date Sep 24, 2019
- International Business Machines Corporation
- Susan E. Eisen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Out-of-order processor that avoids deadlock in processing queues by...
- Patent number 10,169,046
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
History buffer with single snoop tag for multiple-field registers
- Patent number 10,108,423
- Issue date Oct 23, 2018
- International Business Machines Corporation
- Michael J. Genden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Universal history buffer to support multiple register types
- Patent number 9,996,353
- Issue date Jun 12, 2018
- International Business Machines Corporation
- Michael J. Genden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
History buffer for multiple-field registers
- Patent number 9,971,604
- Issue date May 15, 2018
- International Business Machines Corporation
- Sundeep Chadha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor with history buffers storing t...
- Patent number 9,971,687
- Issue date May 15, 2018
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Out-of-order processor that avoids deadlock in processing queues by...
- Patent number 9,798,549
- Issue date Oct 24, 2017
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for frequency independent processor utilizatio...
- Patent number 7,870,406
- Issue date Jan 11, 2011
- International Business Machines Corporation
- Richard Louis Arndt
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Fault tolerant time synchronization mechanism in a scaleable multi-...
- Patent number 7,865,758
- Issue date Jan 4, 2011
- International Business Machines Corporation
- Scott Barnett Swaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for fault tolerant time synchronization mechan...
- Patent number 7,761,726
- Issue date Jul 20, 2010
- International Business Machines Corporation
- Scott Barnett Swaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to launch write queue read data in a microproc...
- Patent number 7,603,497
- Issue date Oct 13, 2009
- International Business Machines Corporation
- Michael J. Mack
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus to launch write queue read data in a microproc...
- Patent number 7,526,583
- Issue date Apr 28, 2009
- International Business Machines Corporation
- Michael J. Mack
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for fault tolerant time synchronization mechan...
- Patent number 7,487,377
- Issue date Feb 3, 2009
- International Business Machines Corporation
- Scott Barnett Swaney
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROCESSOR PROVIDING INTELLIGENT MANAGEMENT OF VALUES BUFFERED IN OV...
- Publication number 20210342150
- Publication date Nov 4, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FINISH EXCEPTION HANDLING OF AN INSTRUCTION COMPLETION TABLE
- Publication number 20210271487
- Publication date Sep 2, 2021
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHECK POINTING OF ACCUMULATOR REGISTER RESULTS IN A MICROPROCESSOR
- Publication number 20210173649
- Publication date Jun 10, 2021
- International Business Machines Corporation
- Steven J Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Speculatively Releasing Stores in a Processor
- Publication number 20200249946
- Publication date Aug 6, 2020
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPLETION MECHANISM FOR A MICROPROCESSOR INSTRUCTION COMPLETION TABLE
- Publication number 20200241880
- Publication date Jul 30, 2020
- International Business Machines Corporation
- Kenneth L. WARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION COMPLETION TABLE WITH READY-TO-COMPLETE VECTOR
- Publication number 20200142697
- Publication date May 7, 2020
- International Business Machines Corporation
- Kenneth L. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM TO STOP COMPLETIONS USING STOP CODES IN AN INSTRUCTION CO...
- Publication number 20200065110
- Publication date Feb 27, 2020
- International Business Machines Corporation
- Kenneth L. WARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR COMPLETING ATOMIC INSTRUCTIONS IN A MICROPROCESSOR
- Publication number 20200065103
- Publication date Feb 27, 2020
- International Business Machines Corporation
- Kenneth L. WARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPLETION MECHANISM FOR A MICROPROCESSOR INSTRUCTION COMPLETION TABLE
- Publication number 20200065102
- Publication date Feb 27, 2020
- International Business Machines Corporation
- Kenneth L. WARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dispatching, Allocating, and Deallocating Instructions in a Queue i...
- Publication number 20200042319
- Publication date Feb 6, 2020
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECULATIVE EXECUTION OF BOTH PATHS OF A WEAKLY PREDICTED BRANCH IN...
- Publication number 20200026520
- Publication date Jan 23, 2020
- International Business Machines Corporation
- Kenneth L. WARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION COMPLETION TABLE CONTAINING ENTRIES THAT SHARE INSTRUCT...
- Publication number 20200026521
- Publication date Jan 23, 2020
- International Business Machines Corporation
- Kenneth L. WARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MOST FAVORED BRANCH ISSUE
- Publication number 20200012496
- Publication date Jan 9, 2020
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRIORITIZED INSTRUCTIONS IN AN INSTRUCTION COMPLETION TABLE OF A SI...
- Publication number 20190187992
- Publication date Jun 20, 2019
- International Business Machines Corporation
- Kenneth L. WARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FINISH STATUS REPORTING FOR A SIMULTANEOUS MULTITHREADING PROCESSOR...
- Publication number 20190187993
- Publication date Jun 20, 2019
- International Business Machines Corporation
- Kenneth L. WARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-DEMAND MULTI-TIERED HANG BUSTER FOR SMT MICROPROCESSOR
- Publication number 20190171569
- Publication date Jun 6, 2019
- International Business Machines Corporation
- Steven J. BATTLE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OUT-OF-ORDER PROCESSOR THAT AVOIDS DEADLOCK IN PROCESSING QUEUES BY...
- Publication number 20180121205
- Publication date May 3, 2018
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FPSCR STICKY BIT HANDLING FOR OUT OF ORDER INSTRUCTION EXECUTION
- Publication number 20170300336
- Publication date Oct 19, 2017
- International Business Machines Corporation
- BRIAN D. BARRICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR WITH HISTORY BUFFERS STORING T...
- Publication number 20170235674
- Publication date Aug 17, 2017
- International Business Machines Corporation
- BRIAN D. BARRICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENTLY MANAGING SPECULATIVE FINISH TRACKING AND ERROR HANDLING...
- Publication number 20170090937
- Publication date Mar 30, 2017
- International Business Machines Corporation
- SUSAN E. EISEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENTLY MANAGING SPECULATIVE FINISH TRACKING AND ERROR HANDLING...
- Publication number 20170090941
- Publication date Mar 30, 2017
- International Business Machines Corporation
- SUSAN E. EISEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
History Buffer with Single Snoop Tag for Multiple-Field Registers
- Publication number 20160283236
- Publication date Sep 29, 2016
- International Business Machines Corporation
- Michael J. Genden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Universal History Buffer to Support Multiple Register Types
- Publication number 20160253177
- Publication date Sep 1, 2016
- International Business Machines Corporation
- Michael J. Genden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
History Buffer for Multiple-Field Registers
- Publication number 20160253181
- Publication date Sep 1, 2016
- International Business Machines Corporation
- Sundeep Chadha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS TO LAUNCH WRITE QUEUE READ DATA IN A MICROPROC...
- Publication number 20090132854
- Publication date May 21, 2009
- Michael J. Mack
- G01 - MEASURING TESTING
Information Patent Application
Fault Tolerant Time Synchronization Mechanism in a Scaleable Multi-...
- Publication number 20080244300
- Publication date Oct 2, 2008
- International Business Machines Corporation
- Scott Barnett Swaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Fault Tolerant Time Synchronization Mechanism in a Large...
- Publication number 20080215906
- Publication date Sep 4, 2008
- International Business Machines Corporation
- Scott Barnett Swaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to launch write queue read data in a microproc...
- Publication number 20070011516
- Publication date Jan 11, 2007
- Michael J. Mack
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for reducing number of cycles required to chec...
- Publication number 20060271820
- Publication date Nov 30, 2006
- Michael James Mack
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for fault tolerant time synchronization mechan...
- Publication number 20060179364
- Publication date Aug 10, 2006
- International Business Machines Corporation
- Scott Barnett Swaney
- G06 - COMPUTING CALCULATING COUNTING

KENNETH L. WARD

Person

Patents Grantslast 30 patents

Completion mechanism for a microprocessor instruction completion table

Processor providing intelligent management of values buffered in ov...

Finish status reporting for a simultaneous multithreading processor...

Check pointing of accumulator register results in a microprocessor

Finish exception handling of an instruction completion table

Prioritized instructions in an instruction completion table of a si...

On-demand multi-tiered hang buster for SMT microprocessor

Instruction completion table with ready-to-complete vector

Speculatively releasing store data before store instruction complet...

Speculative execution of both paths of a weakly predicted branch in...

Dispatching, allocating, and deallocating instructions with real/vi...

Most favored branch issue

Mechanism for completing atomic instructions in a microprocessor

Instruction completion table containing entries that share instruct...

Completion mechanism for a microprocessor instruction completion table

Mechanism to stop completions using stop codes in an instruction co...

Efficiently managing speculative finish tracking and error handling...

Efficiently managing speculative finish tracking and error handling...

Out-of-order processor that avoids deadlock in processing queues by...

History buffer with single snoop tag for multiple-field registers

Universal history buffer to support multiple register types

History buffer for multiple-field registers

Operation of a multi-slice processor with history buffers storing t...

Out-of-order processor that avoids deadlock in processing queues by...

Method and apparatus for frequency independent processor utilizatio...

Fault tolerant time synchronization mechanism in a scaleable multi-...

Method and apparatus for fault tolerant time synchronization mechan...

Method and apparatus to launch write queue read data in a microproc...

Method and apparatus to launch write queue read data in a microproc...

Method and apparatus for fault tolerant time synchronization mechan...

Patents Applicationslast 30 patents

PROCESSOR PROVIDING INTELLIGENT MANAGEMENT OF VALUES BUFFERED IN OV...

FINISH EXCEPTION HANDLING OF AN INSTRUCTION COMPLETION TABLE

CHECK POINTING OF ACCUMULATOR REGISTER RESULTS IN A MICROPROCESSOR

Speculatively Releasing Stores in a Processor

COMPLETION MECHANISM FOR A MICROPROCESSOR INSTRUCTION COMPLETION TABLE

INSTRUCTION COMPLETION TABLE WITH READY-TO-COMPLETE VECTOR

MECHANISM TO STOP COMPLETIONS USING STOP CODES IN AN INSTRUCTION CO...

MECHANISM FOR COMPLETING ATOMIC INSTRUCTIONS IN A MICROPROCESSOR

COMPLETION MECHANISM FOR A MICROPROCESSOR INSTRUCTION COMPLETION TABLE

Dispatching, Allocating, and Deallocating Instructions in a Queue i...

SPECULATIVE EXECUTION OF BOTH PATHS OF A WEAKLY PREDICTED BRANCH IN...

INSTRUCTION COMPLETION TABLE CONTAINING ENTRIES THAT SHARE INSTRUCT...

MOST FAVORED BRANCH ISSUE

PRIORITIZED INSTRUCTIONS IN AN INSTRUCTION COMPLETION TABLE OF A SI...

FINISH STATUS REPORTING FOR A SIMULTANEOUS MULTITHREADING PROCESSOR...

ON-DEMAND MULTI-TIERED HANG BUSTER FOR SMT MICROPROCESSOR

OUT-OF-ORDER PROCESSOR THAT AVOIDS DEADLOCK IN PROCESSING QUEUES BY...

FPSCR STICKY BIT HANDLING FOR OUT OF ORDER INSTRUCTION EXECUTION

OPERATION OF A MULTI-SLICE PROCESSOR WITH HISTORY BUFFERS STORING T...

EFFICIENTLY MANAGING SPECULATIVE FINISH TRACKING AND ERROR HANDLING...

EFFICIENTLY MANAGING SPECULATIVE FINISH TRACKING AND ERROR HANDLING...

History Buffer with Single Snoop Tag for Multiple-Field Registers

Universal History Buffer to Support Multiple Register Types

History Buffer for Multiple-Field Registers

METHOD AND APPARATUS TO LAUNCH WRITE QUEUE READ DATA IN A MICROPROC...

Fault Tolerant Time Synchronization Mechanism in a Scaleable Multi-...

Method for Fault Tolerant Time Synchronization Mechanism in a Large...

Method and apparatus to launch write queue read data in a microproc...

Method and apparatus for reducing number of cycles required to chec...

Method and apparatus for fault tolerant time synchronization mechan...