Kenneth Luis Arcudia

Person

Cary, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-phase switching mode power supply with adaptive synchronous d...
- Patent number 10,992,230
- Issue date Apr 27, 2021
- WAVIOUS, LLC
- Kenneth Arcudia
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Systems and methods for chip to chip communication
- Patent number 9,792,247
- Issue date Oct 17, 2017
- QUALCOMM Incorporated
- Jason Alan Thurston
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Offset calibration for low power and high performance receiver
- Patent number 9,722,823
- Issue date Aug 1, 2017
- QUALCOMM Incorporated
- Minhan Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Accurate sample latch offset compensation scheme
- Patent number 9,614,502
- Issue date Apr 4, 2017
- QUALCOMM Incorporated
- Minhan Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fractional phase locked loop (PLL) architecture
- Patent number 9,577,646
- Issue date Feb 21, 2017
- QUALCOMM Incorporated
- Bupesh Pandita
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatuses, methods, and systems for glitch-free clock switching
- Patent number 9,509,318
- Issue date Nov 29, 2016
- QUALCOMM Incorporated
- Chad Everett Winemiller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wideband transmitter with high-frequency signal peaking
- Patent number 9,497,049
- Issue date Nov 15, 2016
- QUALCOMM Incorporated
- Zhiqin Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase locked loop (PLL) architecture
- Patent number 9,485,085
- Issue date Nov 1, 2016
- QUALCOMM Incorporated
- Kenneth Luis Arcudia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Linearity of phase interpolators by combining current coding and si...
- Patent number 9,485,084
- Issue date Nov 1, 2016
- QUALCOMM Incorporated
- Li Sun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wideband low-power amplifier
- Patent number 9,484,867
- Issue date Nov 1, 2016
- QUALCOMM Incorporated
- Kenneth Luis Arcudia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Offset calibration for low power and high performance receiver
- Patent number 9,385,695
- Issue date Jul 5, 2016
- QUALCOMM Incorporated
- Minhan Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit for generating accurate clock phase signals for high-speed...
- Patent number 9,225,324
- Issue date Dec 29, 2015
- QUALCOMM Incorporated
- Kenneth Arcudia
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Multi-Phase Switching Mode Power Supply with Adaptive Synchronous D...
- Publication number 20210126534
- Publication date Apr 29, 2021
- Wavious, LLC
- Kenneth Arcudia
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
NEW FRACTIONAL PHASE LOCKED LOOP (PLL) ARCHITECTURE
- Publication number 20170041005
- Publication date Feb 9, 2017
- QUALCOMM Incorporated
- Bupesh Pandita
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ACCURATE SAMPLE LATCH OFFSET COMPENSATION SCHEME
- Publication number 20170040983
- Publication date Feb 9, 2017
- QUALCOMM Incorporated
- Minhan Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
OFFSET CALIBRATION FOR LOW POWER AND HIGH PERFORMANCE RECEIVER
- Publication number 20160294583
- Publication date Oct 6, 2016
- QUALCOMM Incorporated
- Minhan Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NOVEL PHASE LOCKED LOOP (PLL) ARCHITECTURE
- Publication number 20160269172
- Publication date Sep 15, 2016
- Qualcomm, Incorporated.
- Kenneth Luis Arcudia
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUSES, METHODS, AND SYSTEMS FOR GLITCH-FREE CLOCK SWITCHING
- Publication number 20160269034
- Publication date Sep 15, 2016
- QUALCOMM Incorporated
- Chad Everett Winemiller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUILT-IN TEST STRUCTURE FOR A RECEIVER
- Publication number 20160216317
- Publication date Jul 28, 2016
- Qualcomm, Incorporated.
- Minhan Chen
- G01 - MEASURING TESTING
Information Patent Application
WIDEBAND TRANSMITTER WITH HIGH-FREQUENCY SIGNAL PEAKING
- Publication number 20160072645
- Publication date Mar 10, 2016
- QUALCOMM Incorporated
- Zhiqin Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS AND METHODS FOR CHIP TO CHIP COMMUNICATION
- Publication number 20160019183
- Publication date Jan 21, 2016
- QUALCOMM Incorporated
- Jason Alan Thurston
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WIDEBAND LOW-POWER AMPLIFIER
- Publication number 20160020740
- Publication date Jan 21, 2016
- QUALCOMM Incorporated
- Kenneth Luis Arcudia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
OFFSET CALIBRATION FOR LOW POWER AND HIGH PERFORMANCE RECEIVER
- Publication number 20150358005
- Publication date Dec 10, 2015
- QUALCOMM Incorporated
- Minhan Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Linearity of Phase Interpolators by Combining Current Coding and Si...
- Publication number 20150358148
- Publication date Dec 10, 2015
- QUALCOMM Incorporated
- Li Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CIRCUIT FOR GENERATING ACCURATE CLOCK PHASE SIGNALS FOR HIGH-SPEED...
- Publication number 20150303909
- Publication date Oct 22, 2015
- QUALCOMM Incorporated
- Kenneth Arcudia
- H03 - BASIC ELECTRONIC CIRCUITRY

Kenneth Luis Arcudia

Person

Patents Grantslast 30 patents

Multi-phase switching mode power supply with adaptive synchronous d...

Systems and methods for chip to chip communication

Offset calibration for low power and high performance receiver

Accurate sample latch offset compensation scheme

Fractional phase locked loop (PLL) architecture

Apparatuses, methods, and systems for glitch-free clock switching

Wideband transmitter with high-frequency signal peaking

Phase locked loop (PLL) architecture

Linearity of phase interpolators by combining current coding and si...

Wideband low-power amplifier

Offset calibration for low power and high performance receiver

Circuit for generating accurate clock phase signals for high-speed...

Patents Applicationslast 30 patents

Multi-Phase Switching Mode Power Supply with Adaptive Synchronous D...

NEW FRACTIONAL PHASE LOCKED LOOP (PLL) ARCHITECTURE

ACCURATE SAMPLE LATCH OFFSET COMPENSATION SCHEME

OFFSET CALIBRATION FOR LOW POWER AND HIGH PERFORMANCE RECEIVER

NOVEL PHASE LOCKED LOOP (PLL) ARCHITECTURE

APPARATUSES, METHODS, AND SYSTEMS FOR GLITCH-FREE CLOCK SWITCHING

BUILT-IN TEST STRUCTURE FOR A RECEIVER

WIDEBAND TRANSMITTER WITH HIGH-FREQUENCY SIGNAL PEAKING

SYSTEMS AND METHODS FOR CHIP TO CHIP COMMUNICATION

WIDEBAND LOW-POWER AMPLIFIER

OFFSET CALIBRATION FOR LOW POWER AND HIGH PERFORMANCE RECEIVER

Linearity of Phase Interpolators by Combining Current Coding and Si...

CIRCUIT FOR GENERATING ACCURATE CLOCK PHASE SIGNALS FOR HIGH-SPEED...