Kenneth R. Faulkner

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory-network processor with programmable optimizations
- Patent number 11,900,124
- Issue date Feb 13, 2024
- Coherent Logix, Incorporated
- Michael B Doerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory network processor
- Patent number 11,829,320
- Issue date Nov 28, 2023
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory network processor
- Patent number 11,550,750
- Issue date Jan 10, 2023
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory-network processor with programmable optimizations
- Patent number 11,016,779
- Issue date May 25, 2021
- Coherent Logix, Incorporated
- Michael B. Doerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory network processor
- Patent number 10,747,709
- Issue date Aug 18, 2020
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock distribution network for multi-frequency multi-processor systems
- Patent number 10,007,293
- Issue date Jun 26, 2018
- Coherent Logix, Incorporated
- Carl S. Dobbs
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Processing system with synchronization instruction
- Patent number 9,558,150
- Issue date Jan 31, 2017
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock distribution network for multi-frequency multi-processor systems
- Patent number 9,450,590
- Issue date Sep 20, 2016
- Coherent Logix, Incorporated
- Carl S. Dobbs
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory-network processor with programmable optimizations
- Patent number 9,430,369
- Issue date Aug 30, 2016
- Coherent Logix, Incorporated
- Michael B. Doerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic selection of on-chip clock in synchronous digital systems
- Patent number 9,325,329
- Issue date Apr 26, 2016
- Coherent Logix, Incorporated
- Carl S. Dobbs
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Processing system with synchronization instruction
- Patent number 9,323,714
- Issue date Apr 26, 2016
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-frequency clock skew control for inter-chip communication in...
- Patent number 9,154,142
- Issue date Oct 6, 2015
- Coherent Logix, Incorporated
- Carl S. Dobbs
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-frequency clock skew control for inter-chip communication in...
- Patent number 8,963,599
- Issue date Feb 24, 2015
- Coherent Logix, Incorporated
- Carl S. Dobbs
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for prioritizing nodes for rerouting and device therefor
- Patent number 7,900,179
- Issue date Mar 1, 2011
- GlobalFoundries Inc.
- Kok-Hoong Kenny Chiu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY-NETWORK PROCESSOR WITH PROGRAMMABLE OPTIMIZATIONS
- Publication number 20230153117
- Publication date May 18, 2023
- Coherent Logix, Incorporated
- Michael B. Doerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Network Processor
- Publication number 20230061478
- Publication date Mar 2, 2023
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-NETWORK PROCESSOR WITH PROGRAMMABLE OPTIMIZATIONS
- Publication number 20210208895
- Publication date Jul 8, 2021
- Coherent Logix, Incorporated
- Michael B. Doerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Network Processor
- Publication number 20210034566
- Publication date Feb 4, 2021
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory-Network Processor with Programmable Optimizations
- Publication number 20190369990
- Publication date Dec 5, 2019
- Coherent Logix, Incorporated
- Michael B. Doerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Network Processor
- Publication number 20190138492
- Publication date May 9, 2019
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK DISTRIBUTION NETWORK FOR MULTI-FREQUENCY MULTI-PROCESSOR SYSTEMS
- Publication number 20160370823
- Publication date Dec 22, 2016
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-NETWORK PROCESSOR WITH PROGRAMMABLE OPTIMIZATIONS
- Publication number 20160328231
- Publication date Nov 10, 2016
- Coherent Logix, Incorporated
- Michael B. Doerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING SYSTEM WITH SYNCHRONIZATION INSTRUCTION
- Publication number 20160196234
- Publication date Jul 7, 2016
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-FREQUENCY CLOCK SKEW CONTROL FOR INTER-CHIP COMMUNICATION IN...
- Publication number 20150162920
- Publication date Jun 11, 2015
- Coherent Logix, Incorporated
- Carl S. Dobbs
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY-NETWORK PROCESSOR WITH PROGRAMMABLE OPTIMIZATIONS
- Publication number 20140351551
- Publication date Nov 27, 2014
- Coherent Logix, Incorporated
- Michael B. Doerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-FREQUENCY CLOCK SKEW CONTROL FOR INTER-CHIP COMMUNICATION IN...
- Publication number 20140167825
- Publication date Jun 19, 2014
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATIC SELECTION OF ON-CHIP CLOCK IN SYNCHRONOUS DIGITAL SYSTEMS
- Publication number 20140173324
- Publication date Jun 19, 2014
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK DISTRIBUTION NETWORK FOR MULTI-FREQUENCY MULTI-PROCESSOR SYSTEMS
- Publication number 20140173321
- Publication date Jun 19, 2014
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING SYSTEM WITH SYNCHRONIZATION INSTRUCTION
- Publication number 20140164735
- Publication date Jun 12, 2014
- Coherent Logix, Incorporated
- Carl S. Dobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR PRIORITIZING NODES FOR REROUTING AND DEVICE THEREFOR
- Publication number 20090300565
- Publication date Dec 3, 2009
- Advanced Micro Devices, Inc.
- Kok-Hoong Kenny Chiu
- G06 - COMPUTING CALCULATING COUNTING

Kenneth R. Faulkner

Person

Patents Grantslast 30 patents

Memory-network processor with programmable optimizations

Memory network processor

Memory network processor

Memory-network processor with programmable optimizations

Memory network processor

Clock distribution network for multi-frequency multi-processor systems

Processing system with synchronization instruction

Clock distribution network for multi-frequency multi-processor systems

Memory-network processor with programmable optimizations

Automatic selection of on-chip clock in synchronous digital systems

Processing system with synchronization instruction

Multi-frequency clock skew control for inter-chip communication in...

Multi-frequency clock skew control for inter-chip communication in...

Method for prioritizing nodes for rerouting and device therefor

Patents Applicationslast 30 patents

MEMORY-NETWORK PROCESSOR WITH PROGRAMMABLE OPTIMIZATIONS

Memory Network Processor

MEMORY-NETWORK PROCESSOR WITH PROGRAMMABLE OPTIMIZATIONS

Memory Network Processor

Memory-Network Processor with Programmable Optimizations

Memory Network Processor

CLOCK DISTRIBUTION NETWORK FOR MULTI-FREQUENCY MULTI-PROCESSOR SYSTEMS

MEMORY-NETWORK PROCESSOR WITH PROGRAMMABLE OPTIMIZATIONS

PROCESSING SYSTEM WITH SYNCHRONIZATION INSTRUCTION

MULTI-FREQUENCY CLOCK SKEW CONTROL FOR INTER-CHIP COMMUNICATION IN...

MEMORY-NETWORK PROCESSOR WITH PROGRAMMABLE OPTIMIZATIONS

MULTI-FREQUENCY CLOCK SKEW CONTROL FOR INTER-CHIP COMMUNICATION IN...

AUTOMATIC SELECTION OF ON-CHIP CLOCK IN SYNCHRONOUS DIGITAL SYSTEMS

CLOCK DISTRIBUTION NETWORK FOR MULTI-FREQUENCY MULTI-PROCESSOR SYSTEMS

PROCESSING SYSTEM WITH SYNCHRONIZATION INSTRUCTION

METHOD FOR PRIORITIZING NODES FOR REROUTING AND DEVICE THEREFOR