Kenneth W. Jones

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Self-timed dynamic level shifter with falling edge generator
- Patent number 9,564,901
- Issue date Feb 7, 2017
- Apple Inc.
- Daniel C. Chow
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory having isolation units for isolating storage arrays from a s...
- Patent number 8,767,495
- Issue date Jul 1, 2014
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory having isolation units for isolating storage arrays from a s...
- Patent number 8,570,824
- Issue date Oct 29, 2013
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with a shared I/O including an output data latch having an i...
- Patent number 8,553,472
- Issue date Oct 8, 2013
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for concurrent search content addressable memo...
- Patent number 5,956,336
- Issue date Sep 21, 1999
- Motorola, Inc.
- Jon Ashor Loschke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory having a read-modify-write operation and simultaneous...
- Patent number 5,802,586
- Issue date Sep 1, 1998
- Motorola, Inc.
- Kenneth W. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit memory using fusible links in a scan chain
- Patent number 5,677,917
- Issue date Oct 14, 1997
- Motorola, Inc.
- Richard A. Wheelus
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay locked loop for detecting the phase difference of two signals...
- Patent number 5,610,543
- Issue date Mar 11, 1997
- Motorola Inc.
- Ray Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
ECL differential multiplexing circuit
- Patent number 5,485,110
- Issue date Jan 16, 1996
- Motorola Inc.
- Kenneth W. Jones
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power-on reset circuit for preventing multiple word line selections...
- Patent number 5,477,176
- Issue date Dec 19, 1995
- Motorola Inc.
- Ray Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
BICMOS cache TAG having ECL reduction circuit with CMOS output
- Patent number 5,473,561
- Issue date Dec 5, 1995
- Motorola Inc.
- Kenneth W. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay locked loop for detecting the phase difference of two signals...
- Patent number 5,440,515
- Issue date Aug 8, 1995
- Motorola Inc.
- Ray Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
ECL-to-CMOS buffer having a single-sided delay
- Patent number 5,422,848
- Issue date Jun 6, 1995
- Motorola Inc.
- Kenneth W. Jones
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous memory having parallel output data paths
- Patent number 5,402,389
- Issue date Mar 28, 1995
- Motorola, Inc.
- Stephen T. Flannagan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory having looped global data lines for propagation delay matching
- Patent number 5,400,274
- Issue date Mar 21, 1995
- Motorola Inc.
- Kenneth W. Jones
- G11 - INFORMATION STORAGE
Information Patent Grant
Pipelined memory having synchronous and asynchronous operating modes
- Patent number 5,384,737
- Issue date Jan 24, 1995
- Motorola Inc.
- Lawrence F. Childs
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory having a write enable controlled word line
- Patent number 5,268,863
- Issue date Dec 7, 1993
- Motorola, Inc.
- Mark D. Bader
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory having output buffer enable by level comparison and method t...
- Patent number 5,258,951
- Issue date Nov 2, 1993
- Motorola, Inc.
- Ruey J. Yu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Memory Having Isolation Units For Isolating Storage Arrays From A S...
- Publication number 20140016392
- Publication date Jan 16, 2014
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY HAVING ISOLATION UNITS FOR ISOLATING STORAGE ARRAYS FROM A S...
- Publication number 20130188435
- Publication date Jul 25, 2013
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH A SHARED I/O INCLUDING AN OUTPUT DATA LATCH HAVING AN I...
- Publication number 20130141988
- Publication date Jun 6, 2013
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING A RETENTION VOLTAGE RESISTOR
- Publication number 20130135955
- Publication date May 30, 2013
- Edward M. McCombs
- G11 - INFORMATION STORAGE

Kenneth W. Jones

Person

Patents Grantslast 30 patents

Self-timed dynamic level shifter with falling edge generator

Memory having isolation units for isolating storage arrays from a s...

Memory having isolation units for isolating storage arrays from a s...

Memory with a shared I/O including an output data latch having an i...

Apparatus and method for concurrent search content addressable memo...

Cache memory having a read-modify-write operation and simultaneous...

Integrated circuit memory using fusible links in a scan chain

Delay locked loop for detecting the phase difference of two signals...

ECL differential multiplexing circuit

Power-on reset circuit for preventing multiple word line selections...

BICMOS cache TAG having ECL reduction circuit with CMOS output

Delay locked loop for detecting the phase difference of two signals...

ECL-to-CMOS buffer having a single-sided delay

Synchronous memory having parallel output data paths

Memory having looped global data lines for propagation delay matching

Pipelined memory having synchronous and asynchronous operating modes

Memory having a write enable controlled word line

Memory having output buffer enable by level comparison and method t...

Patents Applicationslast 30 patents

Memory Having Isolation Units For Isolating Storage Arrays From A S...

MEMORY HAVING ISOLATION UNITS FOR ISOLATING STORAGE ARRAYS FROM A S...

MEMORY WITH A SHARED I/O INCLUDING AN OUTPUT DATA LATCH HAVING AN I...

MEMORY DEVICE INCLUDING A RETENTION VOLTAGE RESISTOR