Kent Orthner

Person

Santa Cruz, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Processing of ethernet packets at a programmable integrated circuit
- Patent number 12,174,782
- Issue date Dec 24, 2024
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Relocatable FPGA modules
- Patent number 12,093,623
- Issue date Sep 17, 2024
- Achronix Semiconductor Corporation
- Michael Riepe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Relocatable FPGA modules
- Patent number 11,853,669
- Issue date Dec 26, 2023
- Achronix Semiconductor Corporation
- Michael Riepe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing of ethernet packets at a programmable integrated circuit
- Patent number 11,615,051
- Issue date Mar 28, 2023
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing of ethernet packets at a programmable integrated circuit
- Patent number 11,341,084
- Issue date May 24, 2022
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing of ethernet packets at a programmable integrated circuit
- Patent number 10,970,248
- Issue date Apr 6, 2021
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible routing of network data within a programmable integrated c...
- Patent number 10,936,525
- Issue date Mar 2, 2021
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable programmable integrated circuit with on-chip network
- Patent number 10,707,875
- Issue date Jul 7, 2020
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip network in programmable integrated circuit
- Patent number 10,608,640
- Issue date Mar 31, 2020
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for configurable interface and associated methods
- Patent number 10,270,447
- Issue date Apr 23, 2019
- Altera Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for configurable interface and associated methods
- Patent number 9,893,727
- Issue date Feb 13, 2018
- Altera Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for configurable interface and associated methods
- Patent number 9,537,488
- Issue date Jan 3, 2017
- Altera Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-configuring components on a device
- Patent number 9,252,776
- Issue date Feb 2, 2016
- Altera Corporation
- Kent Orthner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System level tools to support FPGA partial reconfiguration
- Patent number 9,141,747
- Issue date Sep 22, 2015
- Altera Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System level tools to support FPGA partial reconfiguration
- Patent number 8,910,109
- Issue date Dec 9, 2014
- Altera Corporation
- Kent Orthner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for implementing tristate signaling by using en...
- Patent number 8,659,318
- Issue date Feb 25, 2014
- Altera Corporation
- Brandon Lewis Gordon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for generating a test environment and test syst...
- Patent number 8,504,973
- Issue date Aug 6, 2013
- Altera Corporation
- Wai Kheong Leong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable allocation of thread queue resources in an FPGA
- Patent number 8,166,237
- Issue date Apr 24, 2012
- Altera Corporation
- Sean R. Atsatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible on-chip datapath interface having first and second compone...
- Patent number 8,069,286
- Issue date Nov 29, 2011
- Altera Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable packet format converter
- Patent number 7,912,085
- Issue date Mar 22, 2011
- Altera Corporation
- Kent Orthner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Sliced Router for Network on a Chip
- Publication number 20250055811
- Publication date Feb 13, 2025
- Achronix Semiconductor Corporation
- Pavan Kumar Kasibhatla
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Relocatable FPGA Modules
- Publication number 20240370618
- Publication date Nov 7, 2024
- Achronix Semiconductor Corporation
- Michael Riepe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RELOCATABLE FPGA MODULES
- Publication number 20230367940
- Publication date Nov 16, 2023
- Achronix Semiconductor Corporation
- Michael Riepe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING OF ETHERNET PACKETS AT A PROGRAMMABLE INTEGRATED CIRCUIT
- Publication number 20230229622
- Publication date Jul 20, 2023
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Relocatable FPGA Modules
- Publication number 20230169251
- Publication date Jun 1, 2023
- Achronix Semiconductor Corporation
- Michael Riepe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING OF ETHERNET PACKETS AT A PROGRAMMABLE INTEGRATED CIRCUIT
- Publication number 20220253401
- Publication date Aug 11, 2022
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING OF ETHERNET PACKETS AT A PROGRAMMABLE INTEGRATED CIRCUIT
- Publication number 20210182233
- Publication date Jun 17, 2021
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING OF ETHERNET PACKETS AT A PROGRAMMABLE INTEGRATED CIRCUIT
- Publication number 20200356522
- Publication date Nov 12, 2020
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE ROUTING OF NETWORK DATA WITHIN A PROGRAMMABLE INTEGRATED C...
- Publication number 20200356514
- Publication date Nov 12, 2020
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus For Configurable Interface And Associated Methods
- Publication number 20180026638
- Publication date Jan 25, 2018
- Altera Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY

Kent Orthner

Person

Patents Grantslast 30 patents

Processing of ethernet packets at a programmable integrated circuit

Relocatable FPGA modules

Relocatable FPGA modules

Processing of ethernet packets at a programmable integrated circuit

Processing of ethernet packets at a programmable integrated circuit

Processing of ethernet packets at a programmable integrated circuit

Flexible routing of network data within a programmable integrated c...

Reconfigurable programmable integrated circuit with on-chip network

On-chip network in programmable integrated circuit

Apparatus for configurable interface and associated methods

Apparatus for configurable interface and associated methods

Apparatus for configurable interface and associated methods

Self-configuring components on a device

System level tools to support FPGA partial reconfiguration

System level tools to support FPGA partial reconfiguration

Systems and methods for implementing tristate signaling by using en...

Systems and methods for generating a test environment and test syst...

Configurable allocation of thread queue resources in an FPGA

Flexible on-chip datapath interface having first and second compone...

Programmable packet format converter

Patents Applicationslast 30 patents

Sliced Router for Network on a Chip

Relocatable FPGA Modules

RELOCATABLE FPGA MODULES

PROCESSING OF ETHERNET PACKETS AT A PROGRAMMABLE INTEGRATED CIRCUIT

Relocatable FPGA Modules

PROCESSING OF ETHERNET PACKETS AT A PROGRAMMABLE INTEGRATED CIRCUIT

PROCESSING OF ETHERNET PACKETS AT A PROGRAMMABLE INTEGRATED CIRCUIT

PROCESSING OF ETHERNET PACKETS AT A PROGRAMMABLE INTEGRATED CIRCUIT

FLEXIBLE ROUTING OF NETWORK DATA WITHIN A PROGRAMMABLE INTEGRATED C...

Apparatus For Configurable Interface And Associated Methods