Keshav Bhaktavatson Chintamani

Follow

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Enhanced immunity latched logic state retention
- Patent number 10,734,978
- Issue date Aug 4, 2020
- Texas Instruments Incorporated
- Soman Purushothaman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High performance low retention mode leakage flip-flop
- Patent number 10,340,899
- Issue date Jul 2, 2019
- Texas Instruments Incorporated
- Soman Purushothaman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power and area efficient receiver circuit having constant hysteresi...
- Patent number 7,496,154
- Issue date Feb 24, 2009
- Texas Instruments Incorporated
- Keshav Bhaktavatson Chintamani
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
ENHANCED IMMUNITY LATCHED LOGIC STATE RETENTION
- Publication number 20200212896
- Publication date Jul 2, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Soman Purushothaman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH PERFORMANCE LOW RETENTION MODE LEAKAGE FLIP-FLOP
- Publication number 20180248541
- Publication date Aug 30, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Soman Purushothaman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Power and Area Efficient Receiver Circuit Having Constant Hysteresi...
- Publication number 20060251187
- Publication date Nov 9, 2006
- TEXAS INSTRUMENTS INCORPORATED
- Keshav Bhaktavatson Chintamani
- H03 - BASIC ELECTRONIC CIRCUITRY