Kevin A. Norman

Person

Belmont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Sample and load scheme for observability internal nodes in a PLD
- Patent number RE40894
- Issue date Sep 1, 2009
- Altera Corporation
- Rakesh H. Patel
- 365 - Static information storage and retrieval
Information Patent Grant
High-performance programmable logic architecture
- Patent number 6,882,176
- Issue date Apr 19, 2005
- Altera Corporation
- Kevin A. Norman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High-performance programmable logic architecture
- Patent number 6,570,404
- Issue date May 27, 2003
- Altera Corporation
- Kevin A. Norman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
PLD with on-chip memory having a shadow register
- Patent number 6,353,552
- Issue date Mar 5, 2002
- Altera Corporation
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
FPGA with on-chip multiport memory
- Patent number 6,317,367
- Issue date Nov 13, 2001
- Altera Corporation
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
I/O buffer circuit with pin multiplexing
- Patent number 6,285,211
- Issue date Sep 4, 2001
- Altera Corporation
- Stephen P. Sample
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Input/output buffer with overcurrent protection circuit
- Patent number 6,259,588
- Issue date Jul 10, 2001
- Altera Corporation
- Stephen P. Sample
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sample and load scheme for observability internal nodes in a PLD
- Patent number 6,243,304
- Issue date Jun 5, 2001
- Altera Corporation
- Rakesh H. Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device with multi-port memory
- Patent number 6,219,284
- Issue date Apr 17, 2001
- Altera Corporation
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
Look-up table based logic element with complete permutability of th...
- Patent number 6,184,707
- Issue date Feb 6, 2001
- Altera Corporation
- Kevin A. Norman
- G05 - CONTROLLING REGULATING
Information Patent Grant
Programmable logic device with multi-port memory
- Patent number 6,151,258
- Issue date Nov 21, 2000
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
Input/output buffer with overcurrent protection circuit
- Patent number 6,034,857
- Issue date Mar 7, 2000
- Altera Corporation
- Stephen P. Sample
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Partially reconfigurable programmable logic device
- Patent number 6,020,758
- Issue date Feb 1, 2000
- Altera Corporation
- Rakesh H. Patel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
I/O buffer circuit with pin multiplexing
- Patent number 6,020,760
- Issue date Feb 1, 2000
- Altera Corporation
- Stephen P. Sample
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sample and load scheme for observability of internal nodes in a PLD
- Patent number 6,014,334
- Issue date Jan 11, 2000
- Altera Corporation
- Rakesh H. Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device with multi-port memory
- Patent number 6,011,730
- Issue date Jan 4, 2000
- Altera Corporation
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic device with multi-port memory
- Patent number 6,011,744
- Issue date Jan 4, 2000
- Altera Corporation
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
Diagnostic interface system for programmable logic system development
- Patent number 5,870,410
- Issue date Feb 9, 1999
- Altera Corporation
- Kevin A. Norman
- G01 - MEASURING TESTING
Information Patent Grant
Dynamic configurable elements for programmable logic devices
- Patent number 5,859,544
- Issue date Jan 12, 1999
- Altera Corporation
- Kevin Alan Norman
- G11 - INFORMATION STORAGE
Information Patent Grant
Look-up table based logic element with complete permutability of th...
- Patent number 5,821,773
- Issue date Oct 13, 1998
- Altera Corporation
- Kevin A. Norman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sample and load scheme for observability of internal nodes in a PLD
- Patent number 5,764,079
- Issue date Jun 9, 1998
- Altera Corporation
- Rakesh H. Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of fabricating integrated circuits
- Patent number 5,693,540
- Issue date Dec 2, 1997
- Altera Corporation
- John E. Turner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Unerasable electronic programmable read only memory (UPROM.TM.)
- Patent number 5,525,827
- Issue date Jun 11, 1996
- Kevin A. Norman
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast TTL to CMOS level converting buffer with low standby power
- Patent number 5,359,243
- Issue date Oct 25, 1994
- Altera Corporation
- Kevin A. Norman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Laser alignment target for semiconductor integrated circuits
- Patent number 5,294,975
- Issue date Mar 15, 1994
- Altera Corporation
- Kevin A. Norman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of programming floating gate memory devices aided by potenti...
- Patent number 5,247,477
- Issue date Sep 21, 1993
- Altera Corporation
- Kevin A. Norman
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for programming programmable elements in programmable devices
- Patent number 5,200,920
- Issue date Apr 6, 1993
- Altera Corporation
- Kevin A. Norman
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier for programmable logic device
- Patent number 5,162,680
- Issue date Nov 10, 1992
- Altera Corporation
- Kevin A. Norman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reference voltage generator
- Patent number 5,045,772
- Issue date Sep 3, 1991
- Altera Corporation
- Kunio Nishiwaki
- G05 - CONTROLLING REGULATING
Information Patent Grant
Programmable logic device with programmable word line connections
- Patent number 4,903,223
- Issue date Feb 20, 1990
- Altera Corporation
- Kevin A. Norman
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
PLD with on-chip memory having a shadow
- Publication number 20010017793
- Publication date Aug 30, 2001
- Stephen Sample
- G11 - INFORMATION STORAGE

Kevin A. Norman

Person

Patents Grantslast 30 patents

Sample and load scheme for observability internal nodes in a PLD

High-performance programmable logic architecture

High-performance programmable logic architecture

PLD with on-chip memory having a shadow register

FPGA with on-chip multiport memory

I/O buffer circuit with pin multiplexing

Input/output buffer with overcurrent protection circuit

Sample and load scheme for observability internal nodes in a PLD

Programmable logic device with multi-port memory

Look-up table based logic element with complete permutability of th...

Programmable logic device with multi-port memory

Input/output buffer with overcurrent protection circuit

Partially reconfigurable programmable logic device

I/O buffer circuit with pin multiplexing

Sample and load scheme for observability of internal nodes in a PLD

Programmable logic device with multi-port memory

Programmable logic device with multi-port memory

Diagnostic interface system for programmable logic system development

Dynamic configurable elements for programmable logic devices

Look-up table based logic element with complete permutability of th...

Sample and load scheme for observability of internal nodes in a PLD

Method of fabricating integrated circuits

Unerasable electronic programmable read only memory (UPROM.TM.)

Fast TTL to CMOS level converting buffer with low standby power

Laser alignment target for semiconductor integrated circuits

Method of programming floating gate memory devices aided by potenti...

Method for programming programmable elements in programmable devices

Sense amplifier for programmable logic device

Reference voltage generator

Programmable logic device with programmable word line connections

Patents Applicationslast 30 patents

PLD with on-chip memory having a shadow