Kevin Franklin Reick

Person

Round Rock, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Adaptive frequency optimization in processors
- Patent number 11,422,611
- Issue date Aug 23, 2022
- International Business Machines Corporation
- Nathaniel R. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive frequency optimization in processors
- Patent number 10,509,457
- Issue date Dec 17, 2019
- International Business Machines Corporation
- Nathaniel R. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data driven hardware chips initialization via hardware procedure fr...
- Patent number 9,720,703
- Issue date Aug 1, 2017
- International Business Machines Corporation
- Kevin Franklin Reick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data driven hardware chips initialization via hardware procedure fr...
- Patent number 9,720,704
- Issue date Aug 1, 2017
- International Business Machines Corporation
- Kevin Franklin Reick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Epoch-based recovery for coherent attached processor proxy
- Patent number 9,251,076
- Issue date Feb 2, 2016
- International Business Machines Corporation
- Bartholomew Blaner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Epoch-based recovery for coherent attached processor proxy
- Patent number 9,021,211
- Issue date Apr 28, 2015
- International Business Machines Corporation
- Bartholomew Blaner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-disruptive hardware change
- Patent number 8,650,431
- Issue date Feb 11, 2014
- International Business Machines Corporation
- Michael S. Floyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit design optimization
- Patent number 8,443,313
- Issue date May 14, 2013
- International Business Machines Corporation
- Samuel I. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit design optimization
- Patent number 8,386,230
- Issue date Feb 26, 2013
- International Business Machines Corporation
- Samuel I. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delete of cache line with correctable error
- Patent number 8,291,259
- Issue date Oct 16, 2012
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lateral castout target selection
- Patent number 8,285,939
- Issue date Oct 9, 2012
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for operating cache-inhibited memory mapped commands to a...
- Patent number 8,271,738
- Issue date Sep 18, 2012
- International Business Machines Corporation
- James Stephen Fields, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Recovery from hardware access errors
- Patent number 8,176,355
- Issue date May 8, 2012
- International Business Machines Corporation
- Daniel M. Crowell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing low-level hardware access to in-band and out-of-band firm...
- Patent number 8,090,823
- Issue date Jan 3, 2012
- International Business Machines Corporation
- James Stephen Fields, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for indirect access to a support interface for memory-mapped...
- Patent number 7,916,722
- Issue date Mar 29, 2011
- International Business Machines Corporation
- James Stephen Fields, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient system bootstrap loading
- Patent number 7,765,362
- Issue date Jul 27, 2010
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-chip communication mechanism in distributed node topology to...
- Patent number 7,574,581
- Issue date Aug 11, 2009
- International Business Machines Corporation
- Michael Stephen Floyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for providing low-level hardware access to in-band and out-o...
- Patent number 7,467,204
- Issue date Dec 16, 2008
- International Business Machines Corporation
- James Stephen Fields, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for indirect access to a support interface for memory-mapped...
- Patent number 7,418,541
- Issue date Aug 26, 2008
- International Business Machines Corporation
- James Stephen Fields, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to operate cache-inhibited memory mapped commands to access...
- Patent number 7,392,350
- Issue date Jun 24, 2008
- International Business Machines Corporation
- James Stephen Fields, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient system bootstrap loading
- Patent number 7,386,678
- Issue date Jun 10, 2008
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic, Non-invasive detection of hot-pluggable problem components...
- Patent number 7,117,388
- Issue date Oct 3, 2006
- International Business Machines Corporation
- Ravi Kumar Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system and method with dynamic idle for tunable int...
- Patent number 7,117,126
- Issue date Oct 3, 2006
- International Business Machines Corporation
- Michael Stephen Floyd
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Early clock fault detection method and circuit for detecting clock...
- Patent number 7,089,462
- Issue date Aug 8, 2006
- International Business Machines Corporation
- Michael Stephen Floyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for interface failure survivability using erro...
- Patent number 7,080,288
- Issue date Jul 18, 2006
- International Business Machines Corporation
- Frank David Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated purge store mechanism to flush L2/L3 cache structure for...
- Patent number 7,055,002
- Issue date May 30, 2006
- International Business Machines Corporation
- Robert Alan Cargnoni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data cache scrub mechanism for large L2/L3 data cache structures
- Patent number 7,055,003
- Issue date May 30, 2006
- International Business Machines Corporation
- Robert Alan Cargnoni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for handling multiple bit errors to enhance syste...
- Patent number 7,007,210
- Issue date Feb 28, 2006
- International Business Machines Corporation
- James Stephen Fields, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-disruptive, dynamic hot-plug and hot-remove of server nodes in...
- Patent number 6,990,545
- Issue date Jan 24, 2006
- International Business Machines Corporation
- Ravi Kumar Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing hardware scan dump data
- Patent number 6,832,342
- Issue date Dec 14, 2004
- International Business Machines Corporation
- James Stephen Fields
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ADAPTIVE FREQUENCY OPTIMIZATION IN PROCESSORS
- Publication number 20200073459
- Publication date Mar 5, 2020
- International Business Machines Corporation
- Nathaniel R. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE FREQUENCY OPTIMIZATION IN PROCESSORS
- Publication number 20180292878
- Publication date Oct 11, 2018
- International Business Machines Corporation
- Nathaniel R. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EPOCH-BASED RECOVERY FOR COHERENT ATTACHED PROCESSOR PROXY
- Publication number 20140201467
- Publication date Jul 17, 2014
- International Business Machines Corporation
- Bartholomew Blaner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EPOCH-BASED RECOVERY FOR COHERENT ATTACHED PROCESSOR PROXY
- Publication number 20140201464
- Publication date Jul 17, 2014
- International Business Machines Corporation
- Bartholomew Blaner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA DRIVEN HARDWARE CHIPS INITIALIZATION VIA HARDWARE PROCEDURE FR...
- Publication number 20140149728
- Publication date May 29, 2014
- International Business Machines Corporation
- KEVIN FRANKLIN REICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA DRIVEN HARDWARE CHIPS INITIALIZATION VIA HARDWARE PROCEDURE FR...
- Publication number 20140149731
- Publication date May 29, 2014
- KEVIN FRANKLIN REICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Non-Disruptive Hardware Change
- Publication number 20120054544
- Publication date Mar 1, 2012
- International Business Machines Corporation
- Michael S. Floyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT DESIGN OPTIMIZATION
- Publication number 20120047476
- Publication date Feb 23, 2012
- International Business Machines Corporation
- Samuel I. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT DESIGN OPTIMIZATION
- Publication number 20120046921
- Publication date Feb 23, 2012
- International Business Machines Corporation
- Samuel I. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Delete Of Cache Line With Correctable Error
- Publication number 20100268984
- Publication date Oct 21, 2010
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Lateral Castout Target Selection
- Publication number 20100262782
- Publication date Oct 14, 2010
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Providing Low-Level Hardware Access to In-Band and Out-o...
- Publication number 20090055563
- Publication date Feb 26, 2009
- International Business Machines Corporation
- James Stephen Fields, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR RECOVERY FROM HARDWARE ACCESS ERRORS
- Publication number 20080307287
- Publication date Dec 11, 2008
- Daniel M. Crowell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Indirect Access to a Support Interface for Memory-Mapped...
- Publication number 20080247415
- Publication date Oct 9, 2008
- International Business Machine Corporation
- James Stephen Fields
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT SYSTEM BOOTSTRAP LOADING
- Publication number 20080229022
- Publication date Sep 18, 2008
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus for Operating Cache-Inhibited Memory Mapped Commands to A...
- Publication number 20080209134
- Publication date Aug 28, 2008
- International Business Machines Corporation
- James Stephen Fields
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient system bootstrap loading
- Publication number 20060294309
- Publication date Dec 28, 2006
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for indirect access to a support interface for memory-mapped...
- Publication number 20060176897
- Publication date Aug 10, 2006
- International Business Machines Corporation
- James Stephen Fields
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for providing low-level hardware access to in-band and out-o...
- Publication number 20060179184
- Publication date Aug 10, 2006
- International Business Machines Corporation
- James Stephen Fields
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to operate cache-inhibited memory mapped comma...
- Publication number 20060179251
- Publication date Aug 10, 2006
- International Business Machines Corporation
- James Stephen Fields
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic, Non-invasive detection of hot-pluggable problem components...
- Publication number 20040230731
- Publication date Nov 18, 2004
- International Business Machines Corporation
- Ravi Kumar Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Early clock fault detection method and circuit for detecting clock...
- Publication number 20040221208
- Publication date Nov 4, 2004
- International Business Machines Corporation
- Michael Stephen Floyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanism for FRU fault isolation in distributed nodal environment
- Publication number 20040216003
- Publication date Oct 28, 2004
- International Business Machines Corporation
- Michael Stephen Floyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Non-disruptive, dynamic hot-plug and hot-remove of server nodes in...
- Publication number 20040215865
- Publication date Oct 28, 2004
- International Business Machines Corporation
- Ravi Kumar Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated purge store mechanism to flush L2/L3 cache structure for...
- Publication number 20040215885
- Publication date Oct 28, 2004
- International Business Machines Corporation
- Robert Alan Cargnoni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Non-disruptive, dynamic hot-add and hot-remove of non-symmetric dat...
- Publication number 20040215864
- Publication date Oct 28, 2004
- International Business Machines Corporation
- Ravi Kumar Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for interface failure survivability using erro...
- Publication number 20040216026
- Publication date Oct 28, 2004
- International Business Machines Corporation
- Frank David Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data cache scrub mechanism for large L2/L3 data cache structures
- Publication number 20040215886
- Publication date Oct 28, 2004
- International Business Machines Corporation
- Robert Alan Cargnoni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cross-chip communication mechanism in distributed node topology
- Publication number 20040215929
- Publication date Oct 28, 2004
- International Business Machines Corporation
- Michael Stephen Floyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for handling multiple bit errors to enhance syste...
- Publication number 20030145257
- Publication date Jul 31, 2003
- IBM Corporation
- James Stephen Fields
- G06 - COMPUTING CALCULATING COUNTING

Kevin Franklin Reick

Person

Patents Grantslast 30 patents

Adaptive frequency optimization in processors

Adaptive frequency optimization in processors

Data driven hardware chips initialization via hardware procedure fr...

Data driven hardware chips initialization via hardware procedure fr...

Epoch-based recovery for coherent attached processor proxy

Epoch-based recovery for coherent attached processor proxy

Non-disruptive hardware change

Circuit design optimization

Circuit design optimization

Delete of cache line with correctable error

Lateral castout target selection

Apparatus for operating cache-inhibited memory mapped commands to a...

Recovery from hardware access errors

Providing low-level hardware access to in-band and out-of-band firm...

Method for indirect access to a support interface for memory-mapped...

Efficient system bootstrap loading

Cross-chip communication mechanism in distributed node topology to...

Method for providing low-level hardware access to in-band and out-o...

Method for indirect access to a support interface for memory-mapped...

Method to operate cache-inhibited memory mapped commands to access...

Efficient system bootstrap loading

Dynamic, Non-invasive detection of hot-pluggable problem components...

Data processing system and method with dynamic idle for tunable int...

Early clock fault detection method and circuit for detecting clock...

Method and apparatus for interface failure survivability using erro...

Integrated purge store mechanism to flush L2/L3 cache structure for...

Data cache scrub mechanism for large L2/L3 data cache structures

Method and system for handling multiple bit errors to enhance syste...

Non-disruptive, dynamic hot-plug and hot-remove of server nodes in...

Method and apparatus for reducing hardware scan dump data

Patents Applicationslast 30 patents

ADAPTIVE FREQUENCY OPTIMIZATION IN PROCESSORS

ADAPTIVE FREQUENCY OPTIMIZATION IN PROCESSORS

EPOCH-BASED RECOVERY FOR COHERENT ATTACHED PROCESSOR PROXY

EPOCH-BASED RECOVERY FOR COHERENT ATTACHED PROCESSOR PROXY

DATA DRIVEN HARDWARE CHIPS INITIALIZATION VIA HARDWARE PROCEDURE FR...

DATA DRIVEN HARDWARE CHIPS INITIALIZATION VIA HARDWARE PROCEDURE FR...

Non-Disruptive Hardware Change

CIRCUIT DESIGN OPTIMIZATION

CIRCUIT DESIGN OPTIMIZATION

Delete Of Cache Line With Correctable Error

Lateral Castout Target Selection

Method for Providing Low-Level Hardware Access to In-Band and Out-o...

SYSTEMS AND METHODS FOR RECOVERY FROM HARDWARE ACCESS ERRORS

Method for Indirect Access to a Support Interface for Memory-Mapped...

EFFICIENT SYSTEM BOOTSTRAP LOADING

Apparatus for Operating Cache-Inhibited Memory Mapped Commands to A...

Efficient system bootstrap loading

Method for indirect access to a support interface for memory-mapped...

Method for providing low-level hardware access to in-band and out-o...

Method and apparatus to operate cache-inhibited memory mapped comma...

Dynamic, Non-invasive detection of hot-pluggable problem components...

Early clock fault detection method and circuit for detecting clock...

Mechanism for FRU fault isolation in distributed nodal environment

Non-disruptive, dynamic hot-plug and hot-remove of server nodes in...

Integrated purge store mechanism to flush L2/L3 cache structure for...

Non-disruptive, dynamic hot-add and hot-remove of non-symmetric dat...

Method and apparatus for interface failure survivability using erro...

Data cache scrub mechanism for large L2/L3 data cache structures

Cross-chip communication mechanism in distributed node topology

Method and system for handling multiple bit errors to enhance syste...