Kevin J. Osugi

Person

Gilbert, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Configurable ASIC-embedded cryptographic processing engine
- Patent number 9,866,370
- Issue date Jan 9, 2018
- ITT Manufacturing Enterprises, LLC
- Bryan Doi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for cryptographic processing core
- Patent number 8,850,225
- Issue date Sep 30, 2014
- Exelis Inc.
- Lee Noehring
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for embedded high performance reconfigurable firm...
- Patent number 8,707,051
- Issue date Apr 22, 2014
- Exelis, Inc.
- Kevin Joel Osugi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit and method for performing multiple modulo mathematic operat...
- Patent number 8,090,757
- Issue date Jan 3, 2012
- ITT Manufacturing Enterprises, Inc.
- Richard J. Takahashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for performing multiple modulo mathematic operat...
- Patent number 7,320,015
- Issue date Jan 15, 2008
- ITT Manufacturing Enterprises, Inc.
- Richard J. Takahashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for performing multiple modulo mathematic operat...
- Patent number 6,973,470
- Issue date Dec 6, 2005
- Corrent Corporation
- Richard J. Takahashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware graphics accelerator system and method therefor
- Patent number 5,678,037
- Issue date Oct 14, 1997
- VLSI Technology, Inc.
- Kevin J. Osugi
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS

Patents Applicationslast 30 patents

Information Patent Application
Method and System for Embedded High Performance Reconfigurable Firm...
- Publication number 20120311348
- Publication date Dec 6, 2012
- Kevin Joel Osugi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Cryptographic Processing Core
- Publication number 20110258457
- Publication date Oct 20, 2011
- Lee Noehring
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Configurable ASIC-embedded cryptographic processing engine
- Publication number 20090147945
- Publication date Jun 11, 2009
- ITT Manufacturing Enterprises, Inc.
- Bryan Doi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Circuit and method for performing multiple modulo mathematic operat...
- Publication number 20090106342
- Publication date Apr 23, 2009
- ITT Manufacturing Enterprises, Inc.
- Richard J. Takahashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for performing multiple modulo mathematic operat...
- Publication number 20060015553
- Publication date Jan 19, 2006
- Richard J. Takahashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for performing multiple modulo mathematic operat...
- Publication number 20060010191
- Publication date Jan 12, 2006
- Richard J. Takahashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for performing multiple modulo mathematic operat...
- Publication number 20020194237
- Publication date Dec 19, 2002
- Richard J. Takahashi
- G06 - COMPUTING CALCULATING COUNTING

Kevin J. Osugi

Person

Patents Grantslast 30 patents

Configurable ASIC-embedded cryptographic processing engine

Method and system for cryptographic processing core

Method and system for embedded high performance reconfigurable firm...

Circuit and method for performing multiple modulo mathematic operat...

Circuit and method for performing multiple modulo mathematic operat...

Circuit and method for performing multiple modulo mathematic operat...

Hardware graphics accelerator system and method therefor

Patents Applicationslast 30 patents

Method and System for Embedded High Performance Reconfigurable Firm...

Method and System for Cryptographic Processing Core

Configurable ASIC-embedded cryptographic processing engine

Circuit and method for performing multiple modulo mathematic operat...

Circuit and method for performing multiple modulo mathematic operat...

Circuit and method for performing multiple modulo mathematic operat...

Circuit and method for performing multiple modulo mathematic operat...