Kevin M. McIlvain

Person

Cold Spring, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Efficient and selective sparing of bits in memory systems
- Patent number 11,698,842
- Issue date Jul 11, 2023
- International Business Machines Corporation
- Stephen Glancy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient and selective sparing of bits in memory systems
- Patent number 11,645,171
- Issue date May 9, 2023
- International Business Machines Corporation
- Stephen Glancy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to reduce bandwidth overhead of CRC protection...
- Patent number 11,593,196
- Issue date Feb 28, 2023
- International Business Machines Corporation
- Kevin M. Mcilvain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packeted protocol device test system
- Patent number 11,442,829
- Issue date Sep 13, 2022
- International Business Machines Corporation
- Ryan Patrick King
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to reduce bandwidth overhead of CRC protection...
- Patent number 11,200,112
- Issue date Dec 14, 2021
- International Business Machines Corporation
- Kevin M. Mcilvain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient and selective sparing of bits in memory systems
- Patent number 11,182,262
- Issue date Nov 23, 2021
- International Business Machines Corporation
- Stephen Glancy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using spare bits in memory systems
- Patent number 11,119,676
- Issue date Sep 14, 2021
- International Business Machines Corporation
- Krishna Thangaraj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using dual channel memory as single channel memory with spares
- Patent number 11,037,619
- Issue date Jun 15, 2021
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient and selective sparing of bits in memory systems
- Patent number 10,671,497
- Issue date Jun 2, 2020
- International Business Machines Corporation
- Stephen Glancy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thermal and power memory actions
- Patent number 10,642,504
- Issue date May 5, 2020
- International Business Machines Corporation
- Briana E. Foxworth
- G05 - CONTROLLING REGULATING
Information Patent Grant
Internally-generated data storage in spare memory locations
- Patent number 10,606,696
- Issue date Mar 31, 2020
- International Business Machines Corporation
- David D. Cadigan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using dual channel memory as single channel memory with command add...
- Patent number 10,606,713
- Issue date Mar 31, 2020
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory security protocol
- Patent number 10,585,754
- Issue date Mar 10, 2020
- International Business Machines Corporation
- Briana E. Foxworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using dual channel memory as single channel memory with spares
- Patent number 10,546,628
- Issue date Jan 28, 2020
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Thermal and power memory actions
- Patent number 10,394,618
- Issue date Aug 27, 2019
- International Business Machines Corporation
- Briana E. Foxworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management in multi-channel 3D stacked DRAM
- Patent number 10,353,455
- Issue date Jul 16, 2019
- International Business Machines Corporation
- Kevin M. Mcilvain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-channel nonvolatile memory power loss management
- Patent number 10,338,815
- Issue date Jul 2, 2019
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management in multi-channel 3D stacked DRAM
- Patent number 10,281,974
- Issue date May 7, 2019
- International Business Machines Corporation
- Kevin M. Mcilvain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitwise sparing in a memory system
- Patent number 10,261,856
- Issue date Apr 16, 2019
- International Business Machines Corporation
- Stephen P. Glancy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thermal and power memory actions
- Patent number 10,198,300
- Issue date Feb 5, 2019
- International Business Machines Corporation
- Briana E. Foxworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-channel nonvolatile memory power loss management
- Patent number 10,168,905
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Correcting a data storage error caused by a broken conductor using...
- Patent number 10,127,100
- Issue date Nov 13, 2018
- International Business Machines Corporation
- Edgar R. Cordero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data buffer spare architectures for dual channel serial interface m...
- Patent number 10,042,726
- Issue date Aug 7, 2018
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data buffer spare architectures for dual channel serial interface m...
- Patent number 9,904,611
- Issue date Feb 27, 2018
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjusting power management controls of a memory based on traffic
- Patent number 9,740,267
- Issue date Aug 22, 2017
- International Business Machines Corporation
- Edgar R. Cordero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Functional built-in self test for a chip
- Patent number 9,384,108
- Issue date Jul 5, 2016
- International Business Machines Corporation
- Kevin M. McIlvain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Genie: a method for classification and graphical display of negativ...
- Patent number 7,356,793
- Issue date Apr 8, 2008
- International Business Machines Corporation
- James J. Curtin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Negative slack recoverability factor—a net weight to enhance timing...
- Patent number 7,305,644
- Issue date Dec 4, 2007
- International Business Machines Corporation
- James J. Curtin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for netlist path characteristics extraction
- Patent number 7,290,233
- Issue date Oct 30, 2007
- International Business Machines Corporation
- James J. Curtin
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS TO REDUCE BANDWIDTH OVERHEAD OF CRC PROTECTION...
- Publication number 20220091927
- Publication date Mar 24, 2022
- International Business Machines Corporation
- Kevin M. Mcilvain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT AND SELECTIVE SPARING OF BITS IN MEMORY SYSTEMS
- Publication number 20220027243
- Publication date Jan 27, 2022
- International Business Machines Corporation
- Stephen Glancy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKETED PROTOCOL DEVICE TEST SYSTEM
- Publication number 20210286694
- Publication date Sep 16, 2021
- International Business Machines Corporation
- Ryan Patrick King
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING SPARE BITS IN MEMORY SYSTEMS
- Publication number 20210141550
- Publication date May 13, 2021
- International Business Machines Corporation
- Krishna Thangaraj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT AND SELECTIVE SPARING OF BITS IN MEMORY SYSTEMS
- Publication number 20200226040
- Publication date Jul 16, 2020
- International Business Machines Corporation
- Stephen Glancy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING DUAL CHANNEL MEMORY AS SINGLE CHANNEL MEMORY WITH SPARES
- Publication number 20200075079
- Publication date Mar 5, 2020
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
THERMAL AND POWER MEMORY ACTIONS
- Publication number 20190310896
- Publication date Oct 10, 2019
- International Business Machines Corporation
- Briana E. Foxworth
- G05 - CONTROLLING REGULATING
Information Patent Application
MEMORY SECURITY PROTOCOL
- Publication number 20190243714
- Publication date Aug 8, 2019
- International Business Machines Corporation
- Briana E. Foxworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient and Selective Sparing of Bits in Memory Systems
- Publication number 20190227886
- Publication date Jul 25, 2019
- International Business Machines Corporation
- Stephen Glancy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING DUAL CHANNEL MEMORY AS SINGLE CHANNEL MEMORY WITH SPARES
- Publication number 20190206477
- Publication date Jul 4, 2019
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
USING DUAL CHANNEL MEMORY AS SINGLE CHANNEL MEMORY WITH COMMAND ADD...
- Publication number 20190205225
- Publication date Jul 4, 2019
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERNALLY-GENERATED DATA STORAGE IN SPARE MEMORY LOCATIONS
- Publication number 20190171520
- Publication date Jun 6, 2019
- International Business Machines Corporation
- David D. Cadigan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SECURITY PROTOCOL
- Publication number 20190056999
- Publication date Feb 21, 2019
- International Business Machines Corporation
- Briana E. Foxworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT IN MULTI-CHANNEL 3D STACKED DRAM
- Publication number 20190033949
- Publication date Jan 31, 2019
- International Business Machines Corporation
- Kevin M. Mcilvain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT IN MULTI-CHANNEL 3D STACKED DRAM
- Publication number 20190033952
- Publication date Jan 31, 2019
- International Business Machines Corporation
- Kevin M. Mcilvain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THERMAL AND POWER MEMORY ACTIONS
- Publication number 20190018712
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Briana E. Foxworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THERMAL AND POWER MEMORY ACTIONS
- Publication number 20190018713
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Briana E. Foxworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CHANNEL NONVOLATILE MEMORY POWER LOSS MANAGEMENT
- Publication number 20180356981
- Publication date Dec 13, 2018
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CHANNEL NONVOLATILE MEMORY MANAGEMENT
- Publication number 20180356982
- Publication date Dec 13, 2018
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA BUFFER SPARE ARCHITECTURES FOR DUAL CHANNEL SERIAL INTERFACE M...
- Publication number 20180150369
- Publication date May 31, 2018
- International Business Machines Corporation
- Kyu-Hyoun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BITWISE SPARING IN A MEMORY SYSTEM
- Publication number 20180129554
- Publication date May 10, 2018
- International Business Machines Corporation
- Stephen P. Glancy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CORRECTING A DATA STORAGE ERROR CAUSED BY A BROKEN CONDUCTOR USING...
- Publication number 20170351566
- Publication date Dec 7, 2017
- International Business Machines Corporation
- EDGAR R. CORDERO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUNCTIONAL BUILT-IN SELF TEST FOR A CHIP
- Publication number 20140156253
- Publication date Jun 5, 2014
- International Business Machines Corporation
- Kevin M. McIlvain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Chip Having Timing Analysis of Paths Performed Within the Chip Duri...
- Publication number 20080066036
- Publication date Mar 13, 2008
- International Business Machines Corporation
- James J. Curtin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Negative slack recoverability factor - a net weight to enhance timi...
- Publication number 20060015836
- Publication date Jan 19, 2006
- International Business Machines Corporation
- James J. Curtin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Genie: a method for classification and graphical display of negativ...
- Publication number 20060010410
- Publication date Jan 12, 2006
- International Business Machines Corporation
- James J. Curtin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for netlist path characteristics extraction
- Publication number 20060010411
- Publication date Jan 12, 2006
- International Business Machines Corporation
- James J. Curtin
- G06 - COMPUTING CALCULATING COUNTING

Kevin M. McIlvain

Person

Patents Grantslast 30 patents

Efficient and selective sparing of bits in memory systems

Efficient and selective sparing of bits in memory systems

Method and apparatus to reduce bandwidth overhead of CRC protection...

Packeted protocol device test system

Method and apparatus to reduce bandwidth overhead of CRC protection...

Efficient and selective sparing of bits in memory systems

Using spare bits in memory systems

Using dual channel memory as single channel memory with spares

Efficient and selective sparing of bits in memory systems

Thermal and power memory actions

Internally-generated data storage in spare memory locations

Using dual channel memory as single channel memory with command add...

Memory security protocol

Using dual channel memory as single channel memory with spares

Thermal and power memory actions

Power management in multi-channel 3D stacked DRAM

Multi-channel nonvolatile memory power loss management

Power management in multi-channel 3D stacked DRAM

Bitwise sparing in a memory system

Thermal and power memory actions

Multi-channel nonvolatile memory power loss management

Correcting a data storage error caused by a broken conductor using...

Data buffer spare architectures for dual channel serial interface m...

Data buffer spare architectures for dual channel serial interface m...

Adjusting power management controls of a memory based on traffic

Functional built-in self test for a chip

Genie: a method for classification and graphical display of negativ...

Negative slack recoverability factor—a net weight to enhance timing...

Method for netlist path characteristics extraction

Patents Applicationslast 30 patents

METHOD AND APPARATUS TO REDUCE BANDWIDTH OVERHEAD OF CRC PROTECTION...

EFFICIENT AND SELECTIVE SPARING OF BITS IN MEMORY SYSTEMS

PACKETED PROTOCOL DEVICE TEST SYSTEM

USING SPARE BITS IN MEMORY SYSTEMS

EFFICIENT AND SELECTIVE SPARING OF BITS IN MEMORY SYSTEMS

USING DUAL CHANNEL MEMORY AS SINGLE CHANNEL MEMORY WITH SPARES

THERMAL AND POWER MEMORY ACTIONS

MEMORY SECURITY PROTOCOL

Efficient and Selective Sparing of Bits in Memory Systems

USING DUAL CHANNEL MEMORY AS SINGLE CHANNEL MEMORY WITH SPARES

USING DUAL CHANNEL MEMORY AS SINGLE CHANNEL MEMORY WITH COMMAND ADD...

INTERNALLY-GENERATED DATA STORAGE IN SPARE MEMORY LOCATIONS

MEMORY SECURITY PROTOCOL

POWER MANAGEMENT IN MULTI-CHANNEL 3D STACKED DRAM

POWER MANAGEMENT IN MULTI-CHANNEL 3D STACKED DRAM

THERMAL AND POWER MEMORY ACTIONS

THERMAL AND POWER MEMORY ACTIONS

MULTI-CHANNEL NONVOLATILE MEMORY POWER LOSS MANAGEMENT

MULTI-CHANNEL NONVOLATILE MEMORY MANAGEMENT

DATA BUFFER SPARE ARCHITECTURES FOR DUAL CHANNEL SERIAL INTERFACE M...

BITWISE SPARING IN A MEMORY SYSTEM

CORRECTING A DATA STORAGE ERROR CAUSED BY A BROKEN CONDUCTOR USING...

FUNCTIONAL BUILT-IN SELF TEST FOR A CHIP

Chip Having Timing Analysis of Paths Performed Within the Chip Duri...

Negative slack recoverability factor - a net weight to enhance timi...

Genie: a method for classification and graphical display of negativ...

Method for netlist path characteristics extraction