Kevin Michael Harer

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
System on chip I/O connectivity verification in presence of low pow...
- Patent number 9,514,267
- Issue date Dec 6, 2016
- Synopsys, Inc.
- Kevin Michael Harer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ranking verification results for root cause analysis
- Patent number 9,032,339
- Issue date May 12, 2015
- Synopsys, Inc.
- Kaushik De
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Abstraction-based livelock/deadlock checking for hardware verification
- Patent number 8,302,044
- Issue date Oct 30, 2012
- Synopsys, Inc.
- In-Ho Moon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and Apparatus for Solving Sequential Constraints
- Patent number 7,454,727
- Issue date Nov 18, 2008
- Synopsys, Inc.
- Eduard Cerny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Facilitating structural coverage of a design during design verifica...
- Patent number 7,415,684
- Issue date Aug 19, 2008
- Synopsys, Inc.
- Kevin M. Harer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simulation-based functional verification of microcircuit designs
- Patent number 7,130,783
- Issue date Oct 31, 2006
- Synopsys, Inc.
- Kevin M. Harer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for solving sequential constraints
- Patent number 7,076,753
- Issue date Jul 11, 2006
- Synopsys, Inc.
- Eduard Cerny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive cell separation and circuit changes driven by maximum capa...
- Patent number 6,397,169
- Issue date May 28, 2002
- Synopsys, Inc.
- Narendra V. Shenoy
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
System On Chip I/O Connectivity Verification In Presence Of Low Pow...
- Publication number 20160140281
- Publication date May 19, 2016
- Synopsys, Inc.
- Kevin Michael Harer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RANKING VERIFICATION RESULTS FOR ROOT CAUSE ANALYSIS
- Publication number 20140258954
- Publication date Sep 11, 2014
- Synopsys, Inc.
- Kaushik De
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ABSTRACTION-BASED LIVELOCK/DEADLOCK CHECKING FOR HARDWARE VERIFICATION
- Publication number 20120198397
- Publication date Aug 2, 2012
- Synopsys, Inc.
- In-Ho Moon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Facilitating structural coverage of a design during design verifica...
- Publication number 20070180414
- Publication date Aug 2, 2007
- Kevin M. Harer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for solving sequential constraints
- Publication number 20050138585
- Publication date Jun 23, 2005
- Eduard Cerny
- G06 - COMPUTING CALCULATING COUNTING

Kevin Michael Harer

Person

Patents Grantslast 30 patents

System on chip I/O connectivity verification in presence of low pow...

Ranking verification results for root cause analysis

Abstraction-based livelock/deadlock checking for hardware verification

Method and Apparatus for Solving Sequential Constraints

Facilitating structural coverage of a design during design verifica...

Simulation-based functional verification of microcircuit designs

Method and apparatus for solving sequential constraints

Adaptive cell separation and circuit changes driven by maximum capa...

Patents Applicationslast 30 patents

System On Chip I/O Connectivity Verification In Presence Of Low Pow...

RANKING VERIFICATION RESULTS FOR ROOT CAUSE ANALYSIS

ABSTRACTION-BASED LIVELOCK/DEADLOCK CHECKING FOR HARDWARE VERIFICATION

Facilitating structural coverage of a design during design verifica...

Method and apparatus for solving sequential constraints