Khasim S. Dudekula

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for adaptively reducing artifacts in block-cod...
- Patent number 11,936,915
- Issue date Mar 19, 2024
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for adaptively reducing artifacts in block-cod...
- Patent number 11,546,639
- Issue date Jan 3, 2023
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for adaptively reducing artifacts in block-cod...
- Patent number 11,172,233
- Issue date Nov 9, 2021
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for adaptively reducing artifacts in block-cod...
- Patent number 10,863,204
- Issue date Dec 8, 2020
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for adaptively reducing artifacts in block-cod...
- Patent number 10,440,395
- Issue date Oct 8, 2019
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for adaptively reducing artifacts in block-cod...
- Patent number 9,560,382
- Issue date Jan 31, 2017
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for adaptively reducing artifacts in block-cod...
- Patent number 9,369,735
- Issue date Jun 14, 2016
- Intel Corporation
- Jorge E Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for adaptively reducing artifacts in block-cod...
- Patent number 9,020,046
- Issue date Apr 28, 2015
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for adaptively reducing artifacts in block-cod...
- Patent number 8,520,739
- Issue date Aug 27, 2013
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...
- Publication number 20230134137
- Publication date May 4, 2023
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...
- Publication number 20220021906
- Publication date Jan 20, 2022
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...
- Publication number 20210014538
- Publication date Jan 14, 2021
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...
- Publication number 20200107046
- Publication date Apr 2, 2020
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...
- Publication number 20170013282
- Publication date Jan 12, 2017
- Intel Corporation
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...
- Publication number 20140050268
- Publication date Feb 20, 2014
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for adaptively reducing artifacts in block-cod...
- Publication number 20060251174
- Publication date Nov 9, 2006
- Jorge E. Caviedes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Khasim S. Dudekula

Person

Patents Grantslast 30 patents

Method and apparatus for adaptively reducing artifacts in block-cod...

Method and apparatus for adaptively reducing artifacts in block-cod...

Method and apparatus for adaptively reducing artifacts in block-cod...

Method and apparatus for adaptively reducing artifacts in block-cod...

Method and apparatus for adaptively reducing artifacts in block-cod...

Method and apparatus for adaptively reducing artifacts in block-cod...

Method and apparatus for adaptively reducing artifacts in block-cod...

Method and apparatus for adaptively reducing artifacts in block-cod...

Method and apparatus for adaptively reducing artifacts in block-cod...

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...

METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...

METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...

METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...

METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...

METHOD AND APPARATUS FOR ADAPTIVELY REDUCING ARTIFACTS IN BLOCK-COD...

Method and apparatus for adaptively reducing artifacts in block-cod...