Kian Sin Sim

Person

Penang, MY

People

Patents Grantslast 30 patents

Information Patent Grant
Grid array connection device and method
- Patent number 10,741,515
- Issue date Aug 11, 2020
- Intel Corporation
- Munehiro Toyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Grid array connection device and method
- Patent number 10,373,924
- Issue date Aug 6, 2019
- Intel Corporation
- Munehiro Toyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Grid array connection device and method
- Patent number 9,966,351
- Issue date May 8, 2018
- Intel Corporation
- Munehiro Toyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Grid array connection device and method
- Patent number 9,698,114
- Issue date Jul 4, 2017
- Intel Corporation
- Munehiro Toyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Grid array connection device and method
- Patent number 9,449,936
- Issue date Sep 20, 2016
- Intel Corporation
- Munehiro Toyama
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Grid array connection device and method
- Patent number 7,915,060
- Issue date Mar 29, 2011
- Intel Corporation
- Munehiro Toyama
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Stitched micro-via to enhance adhesion and mechanical strength
- Patent number 7,692,301
- Issue date Apr 6, 2010
- Intel Corporation
- Kum Foo Leong
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Grid array connection device and method
- Patent number 7,670,951
- Issue date Mar 2, 2010
- Intel Corporation
- Munehiro Toyama
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Stitched micro-via to enhance adhesion and mechanical strength
- Patent number 7,229,913
- Issue date Jun 12, 2007
- Intel Corporation
- Kum Foo Leong
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Robust interlocking via
- Patent number 6,946,737
- Issue date Sep 20, 2005
- Intel Corporation
- Jiun Hann Sir
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
GRID ARRAY CONNECTION DEVICE AND METHOD
- Publication number 20190287937
- Publication date Sep 19, 2019
- Intel Corporation
- Munehiro Toyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GRID ARRAY CONNECTION DEVICE AND METHOD
- Publication number 20180247908
- Publication date Aug 30, 2018
- Intel Corporation
- Munehiro Toyama
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
GRID ARRAY CONNECTION DEVICE AND METHOD
- Publication number 20160365325
- Publication date Dec 15, 2016
- Intel Corporation
- Munehiro Toyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GRID ARRAY CONNECTION DEVICE AND METHOD
- Publication number 20150179600
- Publication date Jun 25, 2015
- Munehiro Toyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GRID ARRAY CONNECTION DEVICE AND METHOD
- Publication number 20110169167
- Publication date Jul 14, 2011
- Munehiro Toyama
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
GRID ARRAY CONNECTION DEVICE AND METHOD
- Publication number 20100148365
- Publication date Jun 17, 2010
- Munehiro Toyama
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
STITCHED MICRO-VIA TO ENHANCE ADHESION AND MECHANICAL STRENGTH
- Publication number 20070222058
- Publication date Sep 27, 2007
- Intel Corporation
- Kum Foo Leong
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Grid array connection device and method
- Publication number 20060292737
- Publication date Dec 28, 2006
- Munehiro Toyama
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Robust interlocking via
- Publication number 20050085067
- Publication date Apr 21, 2005
- Jiun Hann Sir
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Robust interlocking via
- Publication number 20050081376
- Publication date Apr 21, 2005
- Jiun Hann Sir
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Stitched micro-via to enhance adhesion and mechanical strength
- Publication number 20050067679
- Publication date Mar 31, 2005
- Intel Corporation
- Kum Foo Leong
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Diffusion barrier layer for lead free package substrate
- Publication number 20050067699
- Publication date Mar 31, 2005
- Intel Corporation
- Kum Foo Leong
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Kian Sin Sim

Person

Patents Grantslast 30 patents

Grid array connection device and method

Grid array connection device and method

Grid array connection device and method

Grid array connection device and method

Grid array connection device and method

Grid array connection device and method

Stitched micro-via to enhance adhesion and mechanical strength

Grid array connection device and method

Stitched micro-via to enhance adhesion and mechanical strength

Robust interlocking via

Patents Applicationslast 30 patents

GRID ARRAY CONNECTION DEVICE AND METHOD

GRID ARRAY CONNECTION DEVICE AND METHOD

GRID ARRAY CONNECTION DEVICE AND METHOD

GRID ARRAY CONNECTION DEVICE AND METHOD

GRID ARRAY CONNECTION DEVICE AND METHOD

GRID ARRAY CONNECTION DEVICE AND METHOD

STITCHED MICRO-VIA TO ENHANCE ADHESION AND MECHANICAL STRENGTH

Grid array connection device and method

Robust interlocking via

Robust interlocking via

Stitched micro-via to enhance adhesion and mechanical strength

Diffusion barrier layer for lead free package substrate