Kimiyoshi Usami

Person

Tokyo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor integrated circuit having an oblique global signal wi...
- Patent number 8,026,537
- Issue date Sep 27, 2011
- Kabushiki Kaisha Toshiba
- Naohito Kojima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power off controlling circuit and power-off controlling method
- Patent number 7,956,678
- Issue date Jun 7, 2011
- Shibaura Institute of Technology
- Kimiyoshi Usami
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor integrated circuit with reduced leakage current
- Patent number 7,109,771
- Issue date Sep 19, 2006
- Kabushiki Kaisha Toshiba
- Toshiyuki Furusawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor integrated circuit with reduced leakage current
- Patent number 7,088,161
- Issue date Aug 8, 2006
- Kabushiki Kaisha Toshiba
- Toshiyuki Furusawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Computer aided design system and computer-readable medium storing a...
- Patent number 7,062,725
- Issue date Jun 13, 2006
- Kabushiki Kaisha Toshiba
- Takeshi Kitahara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit with reduced leakage current
- Patent number 6,861,882
- Issue date Mar 1, 2005
- Kabushiki Kaisha Toshiba
- Toshiyuki Furusawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Logic circuit design equipment and method for designing logic circu...
- Patent number 6,813,750
- Issue date Nov 2, 2004
- Kabushiki Kaisha Toshiba
- Kimiyoshi Usami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit, logic operation circuit, and flip...
- Patent number 6,750,680
- Issue date Jun 15, 2004
- Kabushiki Kaisha Toshiba
- Hidemasa Zama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
SEMICONDUCTOR INTEGRATED CIRCUIT, SUPPLY METHOD FOR SUPPLYING MULTI...
- Patent number 6,683,336
- Issue date Jan 27, 2004
- Kabushiki Kaisha Toshiba
- Mutsunori Igarashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Clock supplying circuit and method having enable buffer cells with...
- Patent number 6,668,363
- Issue date Dec 23, 2003
- Kabushiki Kaisha Toshiba
- Fumihiro Minami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor circuit having a combination circuit being switched b...
- Patent number 6,586,982
- Issue date Jul 1, 2003
- Kabushiki Kaisha Toshiba
- Toshiyuki Furusawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Computer aided design system and computer-readable medium storing a...
- Patent number 6,557,143
- Issue date Apr 29, 2003
- Kabushiki Kaisha Toshiba
- Takeshi Kitahara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit employing power management device...
- Patent number 6,535,982
- Issue date Mar 18, 2003
- Kabushiki Kaisha Toshiba
- Naoyuki Kawabe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic circuit generation apparatus and method, and computer pro...
- Patent number 6,493,856
- Issue date Dec 10, 2002
- Kabushiki Kaisha Toshiba
- Kimiyoshi Usami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for clock gated logic circuits to reduce elect...
- Patent number 6,272,667
- Issue date Aug 7, 2001
- Kabushiki Kaisha Toshiba
- Fumihiro Minami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-power supply integrated circuit evaluation system and method...
- Patent number 6,266,798
- Issue date Jul 24, 2001
- Kabushiki Kaisha Toshiba
- Masahiro Kanazawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit with low-power bus structure and s...
- Patent number 6,175,886
- Issue date Jan 16, 2001
- Kabushiki Kaisha Toshiba
- Kimiyoshi Usami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combinational logic circuit, its design method and integrated circu...
- Patent number 6,167,554
- Issue date Dec 26, 2000
- Kabushiki Kaisha Toshiba
- Takashi Ishikawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit and supply method for supplying mu...
- Patent number 6,097,043
- Issue date Aug 1, 2000
- Kabushiki Kaisha Toshiba
- Mutsunori Igarashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power estimation of a microprocessor based on power consumption of...
- Patent number 6,055,640
- Issue date Apr 25, 2000
- Kabushiki Kaisha Toshiba
- Atsushi Kageshima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic circuit and method of designing the same
- Patent number 5,990,706
- Issue date Nov 23, 1999
- Kabushiki Kaisha Toshiba
- Nobu Matsumoto
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-power supply integrated circuit and system employing the same
- Patent number 5,920,089
- Issue date Jul 6, 1999
- Kabushiki Kaisha Toshiba
- Masahiro Kanazawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low power combinational logic circuit
- Patent number 5,818,256
- Issue date Oct 6, 1998
- Kabushiki Kaisha Toshiba
- Kimiyoshi Usami
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock signal generator and integrated circuit including the clock s...
- Patent number 5,698,995
- Issue date Dec 16, 1997
- Kabushiki Kaisha Toshiba
- Kimiyoshi Usami
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power combinational logic circuit
- Patent number 5,594,368
- Issue date Jan 14, 1997
- Kabushiki Kaisha Toshiba
- Kimiyoshi Usami
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory cell for use in a multi-port RAM
- Patent number 5,307,322
- Issue date Apr 26, 1994
- Kabushiki Kaisha Toshiba
- Kimiyoshi Usami
- G11 - INFORMATION STORAGE
Information Patent Grant
Pipeline circuit
- Patent number 5,237,664
- Issue date Aug 17, 1993
- Kabushiki Kaisha Toshiba
- Kimiyoshi Usami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor logic circuit
- Patent number 5,091,660
- Issue date Feb 25, 1992
- Kabushiki Kaisha Toshiba
- Kimiyoshi Usami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Precharged-type logic circuit having dummy precharge line
- Patent number 5,083,047
- Issue date Jan 21, 1992
- Kabushiki Kaisha Toshiba
- Atsushi Horie
- G11 - INFORMATION STORAGE
Information Patent Grant
Programable logic array using one control clock signal
- Patent number 5,010,258
- Issue date Apr 23, 1991
- Kabushiki Kaisha Toshiba
- Kimiyoshi Usami
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20180197600
- Publication date Jul 12, 2018
- SONY CORPORATION
- Kimiyoshi USAMI
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY CIRCUIT
- Publication number 20180158500
- Publication date Jun 7, 2018
- SONY CORPORATION
- Kimiyoshi USAMI
- G11 - INFORMATION STORAGE
Information Patent Application
POWER-OFF CONTROLLING CIRCUIT AND POWER-OFF CONTROLLING METHOD
- Publication number 20100052770
- Publication date Mar 4, 2010
- Kimiyoshi Usami
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING AN OBLIQUE GLOBAL SIGNAL WI...
- Publication number 20070235766
- Publication date Oct 11, 2007
- Naohito Kojima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor integrated circuit with reduced leakage current
- Publication number 20050035803
- Publication date Feb 17, 2005
- Kabushiki Kaisha Toshiba
- Toshiyuki Furusawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor integrated circuit with reduced leakage current
- Publication number 20050035802
- Publication date Feb 17, 2005
- Kabushiki Kaisha Toshiba
- Toshiyuki Furusawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor integrated circuit having an oblique global signal wi...
- Publication number 20040183103
- Publication date Sep 23, 2004
- Naohito Kojima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer aided design system and computer-readable medium storing a...
- Publication number 20030140318
- Publication date Jul 24, 2003
- KABUSHIKI KAISHA TOSHIBA
- Takeshi Kitahara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor integrated circuit with reduced leakage current
- Publication number 20030102898
- Publication date Jun 5, 2003
- Kabushiki Kaisha Toshiba
- Toshiyuki Furusawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low power test circuit and a semiconductor integrated circuit with...
- Publication number 20030088836
- Publication date May 8, 2003
- Kabushiki Kaisha Toshiba
- Masahiro Kanazawa
- G01 - MEASURING TESTING
Information Patent Application
Logic circuit design equipment and method for designing logic circu...
- Publication number 20020144223
- Publication date Oct 3, 2002
- Kimiyoshi Usami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automatic circuit generation system and automatic circuit generatio...
- Publication number 20020099989
- Publication date Jul 25, 2002
- Naoyuki Kawabe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor integrated circuit with reduced leakage current
- Publication number 20020036529
- Publication date Mar 28, 2002
- Toshiyuki Furusawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor integrated circuit, logic operation circuit, and flip...
- Publication number 20020008545
- Publication date Jan 24, 2002
- KABUSHIKI KAISHA TOSHIBA
- Hidemasa Zama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Automatic circuit generation apparatus and method, and computer pro...
- Publication number 20020002701
- Publication date Jan 3, 2002
- Kimiyoshi Usami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for clock gated logic circuits to reduce elect...
- Publication number 20010029599
- Publication date Oct 11, 2001
- Fumihiro Minami
- G06 - COMPUTING CALCULATING COUNTING

Kimiyoshi Usami

Person

Patents Grantslast 30 patents

Semiconductor integrated circuit having an oblique global signal wi...

Power off controlling circuit and power-off controlling method

Semiconductor integrated circuit with reduced leakage current

Semiconductor integrated circuit with reduced leakage current

Computer aided design system and computer-readable medium storing a...

Semiconductor integrated circuit with reduced leakage current

Logic circuit design equipment and method for designing logic circu...

Semiconductor integrated circuit, logic operation circuit, and flip...

SEMICONDUCTOR INTEGRATED CIRCUIT, SUPPLY METHOD FOR SUPPLYING MULTI...

Clock supplying circuit and method having enable buffer cells with...

Semiconductor circuit having a combination circuit being switched b...

Computer aided design system and computer-readable medium storing a...

Semiconductor integrated circuit employing power management device...

Automatic circuit generation apparatus and method, and computer pro...

Method and apparatus for clock gated logic circuits to reduce elect...

Multi-power supply integrated circuit evaluation system and method...

Semiconductor integrated circuit with low-power bus structure and s...

Combinational logic circuit, its design method and integrated circu...

Semiconductor integrated circuit and supply method for supplying mu...

Power estimation of a microprocessor based on power consumption of...

Logic circuit and method of designing the same

Multi-power supply integrated circuit and system employing the same

Low power combinational logic circuit

Clock signal generator and integrated circuit including the clock s...

Low power combinational logic circuit

Memory cell for use in a multi-port RAM

Pipeline circuit

Semiconductor logic circuit

Precharged-type logic circuit having dummy precharge line

Programable logic array using one control clock signal

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE

NON-VOLATILE MEMORY CIRCUIT

POWER-OFF CONTROLLING CIRCUIT AND POWER-OFF CONTROLLING METHOD

SEMICONDUCTOR INTEGRATED CIRCUIT HAVING AN OBLIQUE GLOBAL SIGNAL WI...

Semiconductor integrated circuit with reduced leakage current

Semiconductor integrated circuit with reduced leakage current

Semiconductor integrated circuit having an oblique global signal wi...

Computer aided design system and computer-readable medium storing a...

Semiconductor integrated circuit with reduced leakage current

Low power test circuit and a semiconductor integrated circuit with...

Logic circuit design equipment and method for designing logic circu...

Automatic circuit generation system and automatic circuit generatio...

Semiconductor integrated circuit with reduced leakage current

Semiconductor integrated circuit, logic operation circuit, and flip...

Automatic circuit generation apparatus and method, and computer pro...

Method and apparatus for clock gated logic circuits to reduce elect...