King-Ho TAM

Person

Hsinchu City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Die to die interface circuit
- Patent number 12,113,051
- Issue date Oct 8, 2024
- Taiwan Semiconductor Manufacturing Company Ltd.
- Tze-Chiang Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Automated system and method for circuit design
- Patent number 12,001,773
- Issue date Jun 4, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shin-Chi Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device in 3D stack with communication interface and m...
- Patent number 11,699,683
- Issue date Jul 11, 2023
- Global Unichip Corporation
- Igor Elkanovich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface for semiconductor device and interfacing method thereof
- Patent number 11,687,472
- Issue date Jun 27, 2023
- Global Unichip Corporation
- Igor Elkanovich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data protection system and method thereof for 3D semiconductor device
- Patent number 11,675,731
- Issue date Jun 13, 2023
- Global Unichip Corporation
- Igor Elkanovich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Die to die interface circuit
- Patent number 11,658,158
- Issue date May 23, 2023
- Taiwan Semiconductor Manufacturing Company Ltd.
- Tze-Chiang Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Automated system and method for circuit design
- Patent number 11,620,426
- Issue date Apr 4, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shin-Chi Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface for semiconductor device with symmetric bond pattern and...
- Patent number 11,144,485
- Issue date Oct 12, 2021
- Global Unichip Corporation
- Igor Elkanovich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface device and interface method for 3D semiconductor device
- Patent number 11,031,923
- Issue date Jun 8, 2021
- Global Unichip Corporation
- Igor Elkanovich
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Characterizing cell using input waveforms with different tail chara...
- Patent number 10,467,364
- Issue date Nov 5, 2019
- Taiwan Semiconductor Manufacturing Company Ltd.
- King-Ho Tam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor circuit design and manufacture method
- Patent number 10,176,284
- Issue date Jan 8, 2019
- Taiwan Semiconductor Manufacturing Company Ltd.
- Li-Chung Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit design method and system
- Patent number 10,169,506
- Issue date Jan 1, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chung-Hsing Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout checking method for advanced double patterning photolithogra...
- Patent number 10,055,531
- Issue date Aug 21, 2018
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chung-Hsing Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Characterizing cell using input waveform generation considering dif...
- Patent number 9,563,734
- Issue date Feb 7, 2017
- Taiwan Semiconductor Manufacturing Company Ltd.
- King-Ho Tam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage control of semiconductor integrated circuits
- Patent number 9,509,301
- Issue date Nov 29, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jerry Chang-Jui Kao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of generating techfile having reduced corner variation value
- Patent number 9,477,803
- Issue date Oct 25, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chung-Hsing Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout modification method and system
- Patent number 9,400,866
- Issue date Jul 26, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Meng-Xiang Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of electromigration avoidance for automatic place...
- Patent number 9,311,440
- Issue date Apr 12, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jerry Kao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cell characterization with Miller capacitance
- Patent number 9,201,107
- Issue date Dec 1, 2015
- Taiwan Semiconductor Manufacturing Company Ltd.
- Nitesh Katta
- G01 - MEASURING TESTING
Information Patent Grant
Layout modification method and system
- Patent number 9,122,839
- Issue date Sep 1, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Meng-Xiang Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for leakage estimation for standard integrated ci...
- Patent number 9,058,462
- Issue date Jun 16, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- King-Ho Tam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of forming a layout including cells having different thresho...
- Patent number 8,826,212
- Issue date Sep 2, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sung-Yen Yeh
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Layout modification method and system
- Patent number 8,826,195
- Issue date Sep 2, 2014
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Meng-Xiang Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic place and route method for electromigration tolerant powe...
- Patent number 8,694,945
- Issue date Apr 8, 2014
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chung-Hsing Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer implemented system and method for leakage calculation
- Patent number 8,499,274
- Issue date Jul 30, 2013
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chien-Ju Chao
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
AUTOMATED SYSTEM AND METHOD FOR CIRCUIT DESIGN
- Publication number 20240303409
- Publication date Sep 12, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shin-Chi Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIE TO DIE INTERFACE CIRCUIT
- Publication number 20230260970
- Publication date Aug 17, 2023
- Taiwan Semiconductor Manufacturing company Ltd.
- Tze-Chiang Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AUTOMATED SYSTEM AND METHOD FOR CIRCUIT DESIGN
- Publication number 20230237238
- Publication date Jul 27, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shin-Chi Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED SYSTEM AND METHOD FOR CIRCUIT DESIGN
- Publication number 20220382946
- Publication date Dec 1, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shin-Chi Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIE TO DIE INTERFACE CIRCUIT
- Publication number 20220068888
- Publication date Mar 3, 2022
- Taiwan Semiconductor Manufacturing company Ltd.
- Tze-Chiang Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE IN 3D STACK WITH COMMUNICATION INTERFACE AND M...
- Publication number 20220059501
- Publication date Feb 24, 2022
- GLOBAL UNICHIP CORPORATION
- Igor Elkanovich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROTECTION SYSTEM AND METHOD THEREOF FOR 3D SEMICONDUCTOR DEVICE
- Publication number 20220058155
- Publication date Feb 24, 2022
- GLOBAL UNICHIP CORPORATION
- Igor Elkanovich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE FOR SEMICONDUCTOR DEVICE AND INTERFACING METHOD THEREOF
- Publication number 20220058144
- Publication date Feb 24, 2022
- GLOBAL UNICHIP CORPORATION
- Igor Elkanovich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DESIGN METHOD
- Publication number 20180096087
- Publication date Apr 5, 2018
- Taiwan Semiconductor Manufacturing company Ltd.
- LI-CHUNG HSU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHARACTERIZING CELL USING INPUT WAVEFORMS WITH DIFFERENT TAIL CHARA...
- Publication number 20170116361
- Publication date Apr 27, 2017
- Taiwan Semiconductor Manufacturing company Ltd.
- KING-HO TAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT DESIGN METHOD AND SYSTEM
- Publication number 20170039310
- Publication date Feb 9, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chung-Hsing WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LAYOUT CHECKING METHOD FOR ADVANCED DOUBLE PATTERNING PHOTOLITHOGRA...
- Publication number 20160239599
- Publication date Aug 18, 2016
- Taiwan Semiconductor Manufacturing company Ltd.
- CHUNG-HSING WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF GENERATING TECHFILE HAVING REDUCED CORNER VARIATION VALUE
- Publication number 20160034631
- Publication date Feb 4, 2016
- Taiwan Semiconductor Manufacturing company Ltd.
- Chung-Hsing WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LAYOUT MODIFICATION METHOD AND SYSTEM
- Publication number 20150363540
- Publication date Dec 17, 2015
- Taiwan Semiconductor Manufacturing Co., LTD
- Meng-Xiang LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHARACTERIZING CELL USING INPUT WAVEFORM GENEARTION CONSIDERING DIF...
- Publication number 20150193569
- Publication date Jul 9, 2015
- Taiwan Semiconductor Manufacturing company Ltd.
- KING-HO TAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR LEAKAGE ESTIMATION FOR STANDARD INTEGRATED CI...
- Publication number 20150067624
- Publication date Mar 5, 2015
- Taiwan Semiconductor Manufacturing company Ltd.
- King-Ho TAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CELL CHARACTERIZATION WITH MILLER CAPACITANCE
- Publication number 20150035551
- Publication date Feb 5, 2015
- Taiwan Semiconductor Manufacturing company Ltd.
- NITESH KATTA
- G01 - MEASURING TESTING
Information Patent Application
VOLTAGE CONTROL OF SEMICONDUCTOR INTEGRATED CIRCUITS
- Publication number 20150001934
- Publication date Jan 1, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jerry Chang-Jui KAO
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
LAYOUT MODIFICATION METHOD AND SYSTEM
- Publication number 20140351784
- Publication date Nov 27, 2014
- Meng-Xiang LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF FORMING A LAYOUT INCLUDING CELLS HAVING DIFFERENT THRESHO...
- Publication number 20140165020
- Publication date Jun 12, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sung-Yen YEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LAYOUT MODIFICATION METHOD AND SYSTEM
- Publication number 20130326438
- Publication date Dec 5, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Meng-Xiang LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF ELECTROMIGRATION AVOIDANCE FOR AUTOMATIC PLACE...
- Publication number 20130304449
- Publication date Nov 14, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Jerry KAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automatic Place and Route Method for Electromigration Tolerant Powe...
- Publication number 20130154128
- Publication date Jun 20, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Chung-Hsing Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER IMPLEMENTED SYSTEM AND METHOD FOR LEAKAGE CALCULATION
- Publication number 20130139120
- Publication date May 30, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Chien-Ju Chao
- G06 - COMPUTING CALCULATING COUNTING

King-Ho TAM

Person

Patents Grantslast 30 patents

Die to die interface circuit

Automated system and method for circuit design

Semiconductor device in 3D stack with communication interface and m...

Interface for semiconductor device and interfacing method thereof

Data protection system and method thereof for 3D semiconductor device

Die to die interface circuit

Automated system and method for circuit design

Interface for semiconductor device with symmetric bond pattern and...

Interface device and interface method for 3D semiconductor device

Characterizing cell using input waveforms with different tail chara...

Semiconductor circuit design and manufacture method

Circuit design method and system

Layout checking method for advanced double patterning photolithogra...

Characterizing cell using input waveform generation considering dif...

Voltage control of semiconductor integrated circuits

Method of generating techfile having reduced corner variation value

Layout modification method and system

System and method of electromigration avoidance for automatic place...

Cell characterization with Miller capacitance

Layout modification method and system

System and method for leakage estimation for standard integrated ci...

Method of forming a layout including cells having different thresho...

Layout modification method and system

Automatic place and route method for electromigration tolerant powe...

Computer implemented system and method for leakage calculation

Patents Applicationslast 30 patents

AUTOMATED SYSTEM AND METHOD FOR CIRCUIT DESIGN

DIE TO DIE INTERFACE CIRCUIT

AUTOMATED SYSTEM AND METHOD FOR CIRCUIT DESIGN

AUTOMATED SYSTEM AND METHOD FOR CIRCUIT DESIGN

DIE TO DIE INTERFACE CIRCUIT

SEMICONDUCTOR DEVICE IN 3D STACK WITH COMMUNICATION INTERFACE AND M...

DATA PROTECTION SYSTEM AND METHOD THEREOF FOR 3D SEMICONDUCTOR DEVICE

INTERFACE FOR SEMICONDUCTOR DEVICE AND INTERFACING METHOD THEREOF

DESIGN METHOD

CHARACTERIZING CELL USING INPUT WAVEFORMS WITH DIFFERENT TAIL CHARA...

CIRCUIT DESIGN METHOD AND SYSTEM

LAYOUT CHECKING METHOD FOR ADVANCED DOUBLE PATTERNING PHOTOLITHOGRA...

METHOD OF GENERATING TECHFILE HAVING REDUCED CORNER VARIATION VALUE

LAYOUT MODIFICATION METHOD AND SYSTEM

CHARACTERIZING CELL USING INPUT WAVEFORM GENEARTION CONSIDERING DIF...

SYSTEM AND METHOD FOR LEAKAGE ESTIMATION FOR STANDARD INTEGRATED CI...

CELL CHARACTERIZATION WITH MILLER CAPACITANCE

VOLTAGE CONTROL OF SEMICONDUCTOR INTEGRATED CIRCUITS

LAYOUT MODIFICATION METHOD AND SYSTEM

METHOD OF FORMING A LAYOUT INCLUDING CELLS HAVING DIFFERENT THRESHO...

LAYOUT MODIFICATION METHOD AND SYSTEM

SYSTEM AND METHOD OF ELECTROMIGRATION AVOIDANCE FOR AUTOMATIC PLACE...

Automatic Place and Route Method for Electromigration Tolerant Powe...

COMPUTER IMPLEMENTED SYSTEM AND METHOD FOR LEAKAGE CALCULATION