Kiran Kumar

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Sunnyvale, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
In situ liner barrier
- Patent number 6,767,832
- Issue date Jul 27, 2004
- LSI Logic Corporation
- Kiran Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate processing system
- Patent number 6,518,193
- Issue date Feb 11, 2003
- LSI Logic Corporation
- Kiran Kumar
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Process for forming metal-filled openings in low dielectric constan...
- Patent number 6,503,840
- Issue date Jan 7, 2003
- LSI Logic Corporation
- Wilbur G. Catabay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming barrier and seed layer
- Patent number 6,489,231
- Issue date Dec 3, 2002
- LSI Logic Corporation
- Kiran Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for electrical determination of delamination a...
- Patent number 6,066,561
- Issue date May 23, 2000
- LSI Logic Corporation
- Kiran Kumar
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Substrate processing system
- Publication number 20030084587
- Publication date May 8, 2003
- LSI Logic Corporation
- Kiran Kumar
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Barrier and seed layer system
- Publication number 20030064593
- Publication date Apr 3, 2003
- LSI Logic Corporation
- Kiran Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for forming metal-filled openings in low dielectric constan...
- Publication number 20020164877
- Publication date Nov 7, 2002
- Wilbur G. Catabay
- H01 - BASIC ELECTRIC ELEMENTS