Kishore K. Chakravorty

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Pellicle frame and lithographic pellicle
- Patent number 8,467,035
- Issue date Jun 18, 2013
- Shin-Etsu Chemical Co., Ltd.
- Toru Shirasaki
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Pellicle frame and lithographic pellicle
- Patent number 8,221,944
- Issue date Jul 17, 2012
- Shin-Etsu Chemical Co., Ltd.
- Toru Shirasaki
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Pellicle frame and lithographic pellicle
- Patent number 8,221,945
- Issue date Jul 17, 2012
- Shin-Etsu Chemical Co., Ltd.
- Toru Shirasaki
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Low stress pellicle frames and reticle pellicle assemblies
- Patent number 7,851,109
- Issue date Dec 14, 2010
- Intel Corporation
- Kishore K. Chakravorty
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Electronic assemblies comprising ceramic/organic hybrid substrate w...
- Patent number 7,535,728
- Issue date May 19, 2009
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Optoelectrical package
- Patent number 7,418,163
- Issue date Aug 26, 2008
- Kishore K. Chakravorty
- G02 - OPTICS
Information Patent Grant
Electronic assemblies and systems comprising interposer with embedd...
- Patent number 7,339,798
- Issue date Mar 4, 2008
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Data processing system comprising ceramic/organic hybrid substrate...
- Patent number 7,120,031
- Issue date Oct 10, 2006
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Conductive core substrate fabrication
- Patent number 7,112,285
- Issue date Sep 26, 2006
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Flip-chip package integrating optical and electrical devices and co...
- Patent number 7,049,704
- Issue date May 23, 2006
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electronic assemblies and systems comprising interposer with embedd...
- Patent number 6,970,362
- Issue date Nov 29, 2005
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Self-aligned coaxial via capacitors
- Patent number 6,963,483
- Issue date Nov 8, 2005
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Structure and method for forming a multilayer electrode for a flat...
- Patent number 6,844,663
- Issue date Jan 18, 2005
- Candescent Intellectual Property
- Jueng Gil Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic assembly comprising ceramic/organic hybrid substrate wit...
- Patent number 6,775,150
- Issue date Aug 10, 2004
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electrode structure and method for forming electrode structure for...
- Patent number 6,764,366
- Issue date Jul 20, 2004
- Candescent Intellectual Property Services, Inc
- Jueng Gil Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip-chip package integrating optical and electrical devices and co...
- Patent number 6,754,407
- Issue date Jun 22, 2004
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electrode structure and method for forming electrode structure for...
- Patent number 6,710,525
- Issue date Mar 23, 2004
- Candescent Technologies Corporation
- Jueng Gil Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic assembly comprising substrate with embedded capacitors
- Patent number 6,611,419
- Issue date Aug 26, 2003
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Self-aligned coaxial via capacitors
- Patent number 6,565,730
- Issue date May 20, 2003
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multiple tier array capacitor
- Patent number 6,532,143
- Issue date Mar 11, 2003
- Intel Corporation
- David G. Figueroa
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Packaging and assembly method for optical coupling
- Patent number 6,512,861
- Issue date Jan 28, 2003
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Interposer substrate with low inductance capacitive paths
- Patent number 6,477,034
- Issue date Nov 5, 2002
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Capacitor with defect isolation and bypass
- Patent number 6,452,776
- Issue date Sep 17, 2002
- Intel Corporation
- Kishore K. Chakravorty
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual-layer metal for flat panel display
- Patent number 6,448,708
- Issue date Sep 10, 2002
- Candescent Intellectual Property Services, Inc.
- Kishore K. Chakravorty
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Row electrode anodization
- Patent number 6,433,473
- Issue date Aug 13, 2002
- Candescent Intellectual Property Services, Inc.
- Kishore K. Chakravorty
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low cost chip size package and method of fabricating the same
- Patent number 6,350,668
- Issue date Feb 26, 2002
- Kishore K. Chakravorty
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate electrode formation method
- Patent number 6,217,403
- Issue date Apr 17, 2001
- Candescent Technologies Corporation
- Kishore K. Chakravorty
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low cost chip size package and method of fabricating the same
- Patent number 6,181,569
- Issue date Jan 30, 2001
- Kishore K. Chakravorty
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Row electrode anodization
- Patent number 6,149,792
- Issue date Nov 21, 2000
- Candescent Technologies Corporation
- Kishore K. Chakravorty
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Patterned resistor suitable for electron-emitting device
- Patent number 6,144,144
- Issue date Nov 7, 2000
- Candescent Technologies Corporation
- James M. Cleeves
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PELLICLE FRAME AND LITHOGRAPHIC PELLICLE
- Publication number 20100328641
- Publication date Dec 30, 2010
- Shin-Etsu Chemical Co., Ltd.
- Toru SHIRASAKI
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
PELLICLE FRAME AND LITHOGRAPHIC PELLICLE
- Publication number 20100330466
- Publication date Dec 30, 2010
- Shin-Etsu Chemical Co., Ltd.
- Toru SHIRASAKI
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
PELLICLE FRAME AND LITHOGRAPHIC PELLICLE
- Publication number 20100330467
- Publication date Dec 30, 2010
- SHIN-ETSU CHEMICAL CO., LTD.,
- Toru Shirasaki
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Low stress pellicle frames and reticle pellicle assemblies
- Publication number 20090246644
- Publication date Oct 1, 2009
- Kishore K. Chakravorty
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Process for fabrication of alternating phase shift masks
- Publication number 20090098469
- Publication date Apr 16, 2009
- Kishore K. Chakravorty
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Alternating phase shift masking
- Publication number 20070231712
- Publication date Oct 4, 2007
- Song Pang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
ELECTRONIC ASSEMBLIES COMPRISING CERAMIC/ORGANIC HYBRID SUBSTRATE W...
- Publication number 20060279940
- Publication date Dec 14, 2006
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Electronic assemblies and systems comprising interposer with embedd...
- Publication number 20060012966
- Publication date Jan 19, 2006
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Electronic assembly comprising ceramic/organic hybrid substrate wit...
- Publication number 20040238942
- Publication date Dec 2, 2004
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Flip-chip package integrating optical and electrical devices and co...
- Publication number 20040208416
- Publication date Oct 21, 2004
- Intel Corporation
- Kishore K. Chakravorty
- G02 - OPTICS
Information Patent Application
Conductive core substrate fabrication
- Publication number 20040110382
- Publication date Jun 10, 2004
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Integrated optoelectrical circuit package with optical waveguide in...
- Publication number 20030185484
- Publication date Oct 2, 2003
- Intel Corporation
- Kishore K. Chakravorty
- G02 - OPTICS
Information Patent Application
Self-aligned coaxial via capacitors
- Publication number 20030168342
- Publication date Sep 11, 2003
- Intel Corporation
- Kishore K. Chakravorty
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Flip-chip package integrating optical and electrical devices and co...
- Publication number 20030002770
- Publication date Jan 2, 2003
- Kishore K. Chakravorty
- G02 - OPTICS
Information Patent Application
PACKAGING AND ASSEMBLY METHOD FOR OPTICAL COUPLING
- Publication number 20020196997
- Publication date Dec 26, 2002
- Kishore K. Chakravorty
- G02 - OPTICS
Information Patent Application
SELF-ALIGNED COAXIAL VIA CAPACITORS
- Publication number 20020134685
- Publication date Sep 26, 2002
- KISHORE K. CHAKRAVORTY
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Application
Multiple tier array capacitor and methods of fabrication therefor
- Publication number 20020085334
- Publication date Jul 4, 2002
- Intel Corporation
- David G. Figueroa
- H01 - BASIC ELECTRIC ELEMENTS

Kishore K. Chakravorty

Person

Patents Grantslast 30 patents

Pellicle frame and lithographic pellicle

Pellicle frame and lithographic pellicle

Pellicle frame and lithographic pellicle

Low stress pellicle frames and reticle pellicle assemblies

Electronic assemblies comprising ceramic/organic hybrid substrate w...

Optoelectrical package

Electronic assemblies and systems comprising interposer with embedd...

Data processing system comprising ceramic/organic hybrid substrate...

Conductive core substrate fabrication

Flip-chip package integrating optical and electrical devices and co...

Electronic assemblies and systems comprising interposer with embedd...

Self-aligned coaxial via capacitors

Structure and method for forming a multilayer electrode for a flat...

Electronic assembly comprising ceramic/organic hybrid substrate wit...

Electrode structure and method for forming electrode structure for...

Flip-chip package integrating optical and electrical devices and co...

Electrode structure and method for forming electrode structure for...

Electronic assembly comprising substrate with embedded capacitors

Self-aligned coaxial via capacitors

Multiple tier array capacitor

Packaging and assembly method for optical coupling

Interposer substrate with low inductance capacitive paths

Capacitor with defect isolation and bypass

Dual-layer metal for flat panel display

Row electrode anodization

Low cost chip size package and method of fabricating the same

Gate electrode formation method

Low cost chip size package and method of fabricating the same

Row electrode anodization

Patterned resistor suitable for electron-emitting device

Patents Applicationslast 30 patents

PELLICLE FRAME AND LITHOGRAPHIC PELLICLE

PELLICLE FRAME AND LITHOGRAPHIC PELLICLE

PELLICLE FRAME AND LITHOGRAPHIC PELLICLE

Low stress pellicle frames and reticle pellicle assemblies

Process for fabrication of alternating phase shift masks

Alternating phase shift masking

ELECTRONIC ASSEMBLIES COMPRISING CERAMIC/ORGANIC HYBRID SUBSTRATE W...

Electronic assemblies and systems comprising interposer with embedd...

Electronic assembly comprising ceramic/organic hybrid substrate wit...

Flip-chip package integrating optical and electrical devices and co...

Conductive core substrate fabrication

Integrated optoelectrical circuit package with optical waveguide in...

Self-aligned coaxial via capacitors

Flip-chip package integrating optical and electrical devices and co...

PACKAGING AND ASSEMBLY METHOD FOR OPTICAL COUPLING

SELF-ALIGNED COAXIAL VIA CAPACITORS

Multiple tier array capacitor and methods of fabrication therefor