Kjersten E. Criss

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Adaptive error correction to improve system memory reliability, ava...
- Patent number 12,235,720
- Issue date Feb 25, 2025
- Intel Corporation
- Rajat Agarwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ECC memory chip encoder and decoder
- Patent number 12,081,234
- Issue date Sep 3, 2024
- Intel Corporation
- Kjersten E. Criss
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
ECC memory chip encoder and decoder
- Patent number 11,601,137
- Issue date Mar 7, 2023
- Intel Corporation
- Kjersten E. Criss
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory with reduced exposure to manufacturing related data corrupti...
- Patent number 11,010,304
- Issue date May 18, 2021
- Intel Corporation
- Uksong Kang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pseudo-channeled DRAM
- Patent number 10,770,129
- Issue date Sep 8, 2020
- Intel Corporation
- Hussein Alameer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller error checking process using internal memory devi...
- Patent number 10,606,690
- Issue date Mar 31, 2020
- Intel Corporation
- Kjersten E. Criss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Targeted aliasing single error correction (SEC) code
- Patent number 10,572,343
- Issue date Feb 25, 2020
- Intel Corporation
- John B. Halbert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stacked memory chip device with enhanced data protection capability
- Patent number 10,459,809
- Issue date Oct 29, 2019
- Intel Corporation
- Hussein Alameer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device on-die error checking and correcting code
- Patent number 9,817,714
- Issue date Nov 14, 2017
- Intel Corporation
- John B Halbert
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
ADAPTIVE INTERNAL ERROR SCRUBBING AND ERROR HANDLING
- Publication number 20240211344
- Publication date Jun 27, 2024
- Intel Corporation
- Kuljit S. BAINS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE ERROR CORRECTION TO IMPROVE SYSTEM MEMORY RELIABILITY, AVA...
- Publication number 20240061741
- Publication date Feb 22, 2024
- Intel Corporation
- Rajat AGARWAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ECC MEMORY CHIP ENCODER AND DECODER
- Publication number 20230049851
- Publication date Feb 16, 2023
- Intel Corporation
- Kjersten E. CRISS
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ECC MEMORY CHIP ENCODER AND DECODER
- Publication number 20200321979
- Publication date Oct 8, 2020
- Intel Corporation
- Kjersten E. CRISS
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY CONTROLLER ERROR CHECKING PROCESS USING INTERNAL MEMORY DEVI...
- Publication number 20190102246
- Publication date Apr 4, 2019
- Intel Corporation
- Kjersten E. CRISS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PSEUDO-CHANNELED DRAM
- Publication number 20190043552
- Publication date Feb 7, 2019
- Intel Corporation
- Hussein Alameer
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED PARITY CHECK FOR CORRECTING MEMORY ERRORS
- Publication number 20190042358
- Publication date Feb 7, 2019
- Intel Corporation
- Kjersten E. CRISS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH REDUCED EXPOSURE TO MANUFACTURING RELATED DATA CORRUPTI...
- Publication number 20190042449
- Publication date Feb 7, 2019
- Intel Corporation
- Uksong KANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STACKED MEMORY CHIP DEVICE WITH ENHANCED DATA PROTECTION CAPABILITY
- Publication number 20190004909
- Publication date Jan 3, 2019
- Intel Corporation
- Hussein ALAMEER
- G11 - INFORMATION STORAGE
Information Patent Application
TARGETED ALIASING SINGLE ERROR CORRECTION (SEC) CODE
- Publication number 20180203761
- Publication date Jul 19, 2018
- Intel Corporation
- John B. HALBERT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREASED REDUNDANCY IN MULTI-DEVICE MEMORY PACKAGE TO IMPROVE RELI...
- Publication number 20180137005
- Publication date May 17, 2018
- Intel Corporation
- Wei Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE ON-DIE ERROR CHECKING AND CORRECTING CODE
- Publication number 20170063394
- Publication date Mar 2, 2017
- Intel Corporation
- John B. Halbert
- H03 - BASIC ELECTRONIC CIRCUITRY

Kjersten E. Criss

Person

Patents Grantslast 30 patents

Adaptive error correction to improve system memory reliability, ava...

ECC memory chip encoder and decoder

ECC memory chip encoder and decoder

Memory with reduced exposure to manufacturing related data corrupti...

Pseudo-channeled DRAM

Memory controller error checking process using internal memory devi...

Targeted aliasing single error correction (SEC) code

Stacked memory chip device with enhanced data protection capability

Memory device on-die error checking and correcting code

Patents Applicationslast 30 patents

ADAPTIVE INTERNAL ERROR SCRUBBING AND ERROR HANDLING

ADAPTIVE ERROR CORRECTION TO IMPROVE SYSTEM MEMORY RELIABILITY, AVA...

ECC MEMORY CHIP ENCODER AND DECODER

ECC MEMORY CHIP ENCODER AND DECODER

MEMORY CONTROLLER ERROR CHECKING PROCESS USING INTERNAL MEMORY DEVI...

PSEUDO-CHANNELED DRAM

SHARED PARITY CHECK FOR CORRECTING MEMORY ERRORS

MEMORY WITH REDUCED EXPOSURE TO MANUFACTURING RELATED DATA CORRUPTI...

STACKED MEMORY CHIP DEVICE WITH ENHANCED DATA PROTECTION CAPABILITY

TARGETED ALIASING SINGLE ERROR CORRECTION (SEC) CODE

INCREASED REDUNDANCY IN MULTI-DEVICE MEMORY PACKAGE TO IMPROVE RELI...

MEMORY DEVICE ON-DIE ERROR CHECKING AND CORRECTING CODE