Klaus Schrüfer

Person

Baldham, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Electronic circuit arrangement with an electrical fuse
- Patent number 8,698,275
- Issue date Apr 15, 2014
- Infineon Technologies AG
- Hans-Joachim Barth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a memory device having a memory array includi...
- Patent number 8,389,357
- Issue date Mar 5, 2013
- Infineon Technologies AG
- Ronald Kakoschke
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory device having columns having multiple bit lines
- Patent number 8,288,813
- Issue date Oct 16, 2012
- Infineon Technologies AG
- Ronald Kakoschke
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory device having columns having multiple bit lines
- Patent number 7,915,662
- Issue date Mar 29, 2011
- Infineon Technologies AG
- Ronald Kakoschke
Information Patent Grant
Bipolar transistor FINFET technology
- Patent number 7,834,403
- Issue date Nov 16, 2010
- Infineon Technologies AG
- Ronald Kakoschke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field effect transistor with local source/drain insulation and asso...
- Patent number 7,528,453
- Issue date May 5, 2009
- Infineon Technologies AG
- Jürgen Holz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-transistor memory cells
- Patent number 7,440,334
- Issue date Oct 21, 2008
- Infineon Technologies
- Hans-Joachim Barth
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED MEMORY DEVICE HAVING COLUMNS HAVING MULTIPLE BIT LINES
- Publication number 20110171803
- Publication date Jul 14, 2011
- Ronald Kakoschke
- G11 - INFORMATION STORAGE
Information Patent Application
BIPOLAR TRANSISTOR FINFET TECHNOLOGY
- Publication number 20110053331
- Publication date Mar 3, 2011
- Ronald KAKOSCHKE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIELD-EFFECT TRANSISTOR WITH LOCAL SOURCE/DRAIN INSULATION AND ASSO...
- Publication number 20110012208
- Publication date Jan 20, 2011
- INFINEON TECHNOLOGIES AG
- Jüergen Holz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIELD-EFFECT TRANSISTOR WITH LOCAL SOURCE/DRAIN INSULATION AND ASSO...
- Publication number 20090227083
- Publication date Sep 10, 2009
- Infineon Technologies AG
- Jurgen Holz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BIPOLAR TRANSISTOR FINFET TECHNOLOGY
- Publication number 20090045467
- Publication date Feb 19, 2009
- Infineon Technologies AGAM CAMPEON
- Ronald Kakoschke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic circuit arrangement
- Publication number 20070063313
- Publication date Mar 22, 2007
- Hans-Joachim Barth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-transistor memory cells
- Publication number 20060164876
- Publication date Jul 27, 2006
- Infineon Technologies AG
- Hans-Joachim Barth
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory device and process
- Publication number 20060033145
- Publication date Feb 16, 2006
- Ronald Kakoschke
- G11 - INFORMATION STORAGE
Information Patent Application
Field effect transistor with local source/drain insulation and asso...
- Publication number 20050280052
- Publication date Dec 22, 2005
- Jurgen Holz
- H01 - BASIC ELECTRIC ELEMENTS

Klaus Schrüfer

Person

Patents Grantslast 30 patents

Electronic circuit arrangement with an electrical fuse

Method of fabricating a memory device having a memory array includi...

Integrated memory device having columns having multiple bit lines

Integrated memory device having columns having multiple bit lines

Bipolar transistor FINFET technology

Field effect transistor with local source/drain insulation and asso...

Multi-transistor memory cells

Patents Applicationslast 30 patents

INTEGRATED MEMORY DEVICE HAVING COLUMNS HAVING MULTIPLE BIT LINES

BIPOLAR TRANSISTOR FINFET TECHNOLOGY

FIELD-EFFECT TRANSISTOR WITH LOCAL SOURCE/DRAIN INSULATION AND ASSO...

FIELD-EFFECT TRANSISTOR WITH LOCAL SOURCE/DRAIN INSULATION AND ASSO...

BIPOLAR TRANSISTOR FINFET TECHNOLOGY

Electronic circuit arrangement

Multi-transistor memory cells

Integrated memory device and process

Field effect transistor with local source/drain insulation and asso...