Kok Siong Tee

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Gelugor, MY

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Patents Grantslast 30 patents

Information Patent Grant
Gate array architecture with multiple programmable regions
- Patent number 8,788,984
- Issue date Jul 22, 2014
- Baysand Inc.
- Jonathan C Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Gate array architecture with multiple programmable regions
- Patent number 8,533,641
- Issue date Sep 10, 2013
- Baysand Inc.
- Jonathan C Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hotsocket detection circuitry
- Patent number 7,893,716
- Issue date Feb 22, 2011
- Altera Corporation
- Jack Chui
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low-jitter adjustable level shifter with native devices and kicker
- Patent number 7,180,329
- Issue date Feb 20, 2007
- Altera Corporation
- Ket Chiew Sia
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Gate array architecture with multiple programmable regions
- Publication number 20150048425
- Publication date Feb 19, 2015
- Baysand Inc.
- Jonathan C. Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Gate array architecture with multiple programmable regions
- Publication number 20130334576
- Publication date Dec 19, 2013
- Baysand Inc.
- Jonathan C Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GATE ARRAY ARCHITECTURE WITH MULTIPLE PROGRAMMABLE REGIONS
- Publication number 20130087834
- Publication date Apr 11, 2013
- Jonathan C. Park
- G06 - COMPUTING CALCULATING COUNTING