Koray Oner

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory controller with emulative internal memory buffer
- Patent number 8,825,948
- Issue date Sep 2, 2014
- Broadcom Corporation
- Koray Oner
- G11 - INFORMATION STORAGE
Information Patent Grant
Packet manager interrupt mapper
- Patent number 7,584,316
- Issue date Sep 1, 2009
- Broadcom Corporation
- Koray Oner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Exponential channelized timer
- Patent number 7,475,271
- Issue date Jan 6, 2009
- Broadcom Corporation
- Koray Oner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Descriptor write back delay mechanism to improve performance
- Patent number 7,440,469
- Issue date Oct 21, 2008
- Broadcom Corporation
- Koray Oner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fragment storage for data alignment and merger
- Patent number 7,243,172
- Issue date Jul 10, 2007
- Broadcom Corporation
- Koray Oner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Descriptor-based load balancing
- Patent number 6,981,074
- Issue date Dec 27, 2005
- Broadcom Corporation
- Koray Oner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data pend mechanism
- Patent number 6,948,035
- Issue date Sep 20, 2005
- Broadcom Corporation
- Joseph B. Rowlands
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System having interfaces and switch that separates coherent and pac...
- Patent number 6,941,406
- Issue date Sep 6, 2005
- Broadcom Corporation
- Barton J. Sano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Addressing scheme supporting variable local addressing and variable...
- Patent number 6,941,440
- Issue date Sep 6, 2005
- Broadcom Corporation
- Laurent R. Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System having two or more packet interfaces, a switch, and a shared...
- Patent number 6,912,602
- Issue date Jun 28, 2005
- Broadcom Corporation
- Barton J. Sano
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System having interfaces and switch that separates coherent and pac...
- Patent number 6,748,479
- Issue date Jun 8, 2004
- Broadcom Corporation
- Barton J. Sano
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Memory controller with emulative internal memory buffer
- Publication number 20120124280
- Publication date May 17, 2012
- BROADCOM CORPORATION
- Koray Oner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System having interfaces and switch that separates coherent and pac...
- Publication number 20050226234
- Publication date Oct 13, 2005
- Barton J. Sano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Addressing scheme supporting variable local addressing and variable...
- Publication number 20050223188
- Publication date Oct 6, 2005
- Laurent R. Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System having two or more packet interfaces, a switch, and a shared...
- Publication number 20050147105
- Publication date Jul 7, 2005
- Barton J. Sano
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Packet manager interrupt mapper
- Publication number 20050078694
- Publication date Apr 14, 2005
- BROADCOM CORPORATION
- Koray Oner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fragment storage for data alignment and merger
- Publication number 20050080953
- Publication date Apr 14, 2005
- BROADCOM CORPORATION
- Koray Oner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Descriptor-based load balancing
- Publication number 20050080952
- Publication date Apr 14, 2005
- BROADCOM CORPORATION
- Koray Oner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Descriptor write back delay mechanism to improve performance
- Publication number 20050078696
- Publication date Apr 14, 2005
- BROADCOM CORPORATION
- Koray Oner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Exponential channelized timer
- Publication number 20050078669
- Publication date Apr 14, 2005
- BROADCOM CORPORATION
- Koray Oner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System having interfaces and switch that separates coherent and pac...
- Publication number 20040221072
- Publication date Nov 4, 2004
- Barton J. Sano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Addressing scheme supporting variable local addressing and variable...
- Publication number 20040044806
- Publication date Mar 4, 2004
- Laurent R. Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data pend mechanism
- Publication number 20030217238
- Publication date Nov 20, 2003
- BROADCOM CORPORATION
- Joseph B. Rowlands
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System having interfaces and switch that separates coherent and pac...
- Publication number 20030097416
- Publication date May 22, 2003
- Broadcom Corp.
- Barton J. Sano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System having two or more packet interfaces, a switch, and a shared...
- Publication number 20030097498
- Publication date May 22, 2003
- Broadcom Corp.
- Barton J. Sano
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

Memory controller with emulative internal memory buffer

Packet manager interrupt mapper

Exponential channelized timer

Descriptor write back delay mechanism to improve performance

Fragment storage for data alignment and merger

Descriptor-based load balancing

Data pend mechanism

System having interfaces and switch that separates coherent and pac...

Addressing scheme supporting variable local addressing and variable...

System having two or more packet interfaces, a switch, and a shared...

System having interfaces and switch that separates coherent and pac...

Patents Applicationslast 30 patents

Memory controller with emulative internal memory buffer

System having interfaces and switch that separates coherent and pac...

Addressing scheme supporting variable local addressing and variable...

System having two or more packet interfaces, a switch, and a shared...

Packet manager interrupt mapper

Fragment storage for data alignment and merger

Descriptor-based load balancing

Descriptor write back delay mechanism to improve performance

Exponential channelized timer

System having interfaces and switch that separates coherent and pac...

Addressing scheme supporting variable local addressing and variable...

Data pend mechanism

System having interfaces and switch that separates coherent and pac...

System having two or more packet interfaces, a switch, and a shared...