Koustav Ganguly

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Low resistance approaches for fabricating contacts and the resultin...
- Patent number 12,119,387
- Issue date Oct 15, 2024
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional integrated circuits (3DICs) including bottom gate...
- Patent number 11,996,404
- Issue date May 28, 2024
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional integrated circuits (3DICs) including bottom gate...
- Patent number 11,244,943
- Issue date Feb 8, 2022
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
CONTACT RESISTANCE REDUCTION IN TRANSISTOR DEVICES WITH METALLIZATI...
- Publication number 20240347610
- Publication date Oct 17, 2024
- Intel Corporation
- Koustav GANGULY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOURCE OR DRAIN METALLIZATION PRIOR TO CONTACT FORMATION IN STACKED...
- Publication number 20230197777
- Publication date Jun 22, 2023
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIODE STRUCTURE WITH BACKSIDE EPITAXIAL GROWTH
- Publication number 20230197862
- Publication date Jun 22, 2023
- Intel Corporation
- Prashant Majhi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH REDUCED EPITAXIAL SOURCE/DRAIN SPAN VIA ETCH-BACK...
- Publication number 20230095191
- Publication date Mar 30, 2023
- Intel Corporation
- Koustav Ganguly
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED INTERCONNECT STRUCTURES AND METHODS OF FABRICATION
- Publication number 20220199468
- Publication date Jun 23, 2022
- Intel Corporation
- Kimin Jun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOURCE & DRAIN DOPANT DIFFUSION BARRIERS FOR N-TYPE GERMANIUM TRANS...
- Publication number 20220199402
- Publication date Jun 23, 2022
- Intel Corporation
- Koustav Ganguly
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW RESISTANCE APPROACHES FOR FABRICATING CONTACTS AND THE RESULTIN...
- Publication number 20220102521
- Publication date Mar 31, 2022
- Intel Corporation
- Gilbert DEWEY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL INTEGRATED CIRCUITS (3DICS) INCLUDING BOTTOM GATE...
- Publication number 20220093586
- Publication date Mar 24, 2022
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING STRAINED SOURC...
- Publication number 20210408283
- Publication date Dec 30, 2021
- Intel Corporation
- Ashish AGRAWAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING STRAINED SOURC...
- Publication number 20210408284
- Publication date Dec 30, 2021
- Intel Corporation
- Ashish AGRAWAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT RESISTANCE REDUCTION IN TRANSISTOR DEVICES WITH METALLIZATI...
- Publication number 20210408246
- Publication date Dec 30, 2021
- Intel Corporation
- Koustav GANGULY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING STRAINED DUAL...
- Publication number 20210407996
- Publication date Dec 30, 2021
- Ashish AGRAWAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL INTEGRATED CIRCUITS (3DICS) INCLUDING BOTTOM GATE...
- Publication number 20210202476
- Publication date Jul 1, 2021
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS

Koustav Ganguly

Person

Patents Grantslast 30 patents

Low resistance approaches for fabricating contacts and the resultin...

Three-dimensional integrated circuits (3DICs) including bottom gate...

Three-dimensional integrated circuits (3DICs) including bottom gate...

Patents Applicationslast 30 patents

CONTACT RESISTANCE REDUCTION IN TRANSISTOR DEVICES WITH METALLIZATI...

SOURCE OR DRAIN METALLIZATION PRIOR TO CONTACT FORMATION IN STACKED...

DIODE STRUCTURE WITH BACKSIDE EPITAXIAL GROWTH

TRANSISTORS WITH REDUCED EPITAXIAL SOURCE/DRAIN SPAN VIA ETCH-BACK...

SELF-ALIGNED INTERCONNECT STRUCTURES AND METHODS OF FABRICATION

SOURCE & DRAIN DOPANT DIFFUSION BARRIERS FOR N-TYPE GERMANIUM TRANS...

LOW RESISTANCE APPROACHES FOR FABRICATING CONTACTS AND THE RESULTIN...

THREE-DIMENSIONAL INTEGRATED CIRCUITS (3DICS) INCLUDING BOTTOM GATE...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING STRAINED SOURC...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING STRAINED SOURC...

CONTACT RESISTANCE REDUCTION IN TRANSISTOR DEVICES WITH METALLIZATI...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING STRAINED DUAL...

THREE-DIMENSIONAL INTEGRATED CIRCUITS (3DICS) INCLUDING BOTTOM GATE...