Krste Mitric

Person

Ottawa, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Circuit and method for generating temperature-stable clocks using o...
- Patent number 10,992,301
- Issue date Apr 27, 2021
- Microsemi Semiconductor ULC
- Krste Mitric
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Time-to-digital converter with phase-scaled course-fine resolution
- Patent number 10,007,235
- Issue date Jun 26, 2018
- Microsemi Semiconductor ULC
- Tuoxin Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
PLL system with master and slave devices
- Patent number 10,007,639
- Issue date Jun 26, 2018
- Microsemi Semiconductor ULC
- Krste Mitric
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware delay compensation in digital phase locked loop
- Patent number 9,667,237
- Issue date May 30, 2017
- Microsemi Semiconductor ULC
- Qu Gary Jin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for generating clock signals having a PLL part and synthe...
- Patent number 9,647,674
- Issue date May 9, 2017
- Microsemi Semiconductor ULC
- Paul H. L. M. Schram
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop with jump-free holdover mode
- Patent number 9,634,675
- Issue date Apr 25, 2017
- Microsemi Semiconductor ULC
- Paul H. L. M. Schram
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop with accurate alignment among output clocks
- Patent number 9,584,138
- Issue date Feb 28, 2017
- Microsemi Semiconductor ULC
- Krste Mitric
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop with the ability to accurately apply phase offset...
- Patent number 9,094,185
- Issue date Jul 28, 2015
- Microsemi Semiconductor ULC
- Paul H. L. M. Schram
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase locked loop with precise phase and frequency slope limiter
- Patent number 8,957,711
- Issue date Feb 17, 2015
- Microsemi Semiconductor ULC
- Q. Gary Jin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop with simultaneous locking to low and high frequen...
- Patent number 8,907,706
- Issue date Dec 9, 2014
- Microsemi Semiconductor ULC
- Krste Mitric
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital FM radio transmitter
- Patent number 8,090,316
- Issue date Jan 3, 2012
- Microsemi Semiconductor Corp.
- Slobodan Milijevic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digitally controlled oscillator with jitter shaping capability
- Patent number 7,548,119
- Issue date Jun 16, 2009
- Zarlink Semiconductor Inc.
- Krste Mitric
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital phase-locked loop with master-slave modes
- Patent number 7,242,740
- Issue date Jul 10, 2007
- Zarlink Semiconductor Inc.
- Menno Tjeerd Spijker
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase locked loop with selectable normal or fast-locking ca...
- Patent number 7,126,429
- Issue date Oct 24, 2006
- Zarlink Semiconductor Inc.
- Krste Mitric
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
TIME-TO-DIGITAL CONVERTER WITH PHASE-SCALED COURSE-FINE RESOLUTION
- Publication number 20180088535
- Publication date Mar 29, 2018
- MICROSEMI SEMICONDUCTOR ULC
- Tuoxin Wang
- G04 - HOROLOGY
Information Patent Application
Phase Locked Loop with Accurate Alignment among Output Clocks
- Publication number 20160301417
- Publication date Oct 13, 2016
- MICROSEMI SEMICONDUCTOR ULC
- Krste Mitric
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PLL SYSTEM WITH MASTER AND SLAVE DEVICES
- Publication number 20160299870
- Publication date Oct 13, 2016
- MICROSEMI SEMICONDUCTOR ULC
- Krste Mitric
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus for Generating Clock Signals having a PLL part and Synthe...
- Publication number 20160301419
- Publication date Oct 13, 2016
- MICROSEMI SEMICONDUCTOR ULC
- Paul H.L.M. Schram
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Hardware Delay Compensation in Digital Phase Locked Loop
- Publication number 20160294401
- Publication date Oct 6, 2016
- MICROSEMI SEMICONDUCTOR ULC
- Qu Gary Jin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Phase Locked Loop with Jump-Free Holdover Mode
- Publication number 20160294399
- Publication date Oct 6, 2016
- MICROSEMI SEMICONDUCTOR ULC
- Paul H.L.M. Schram
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Phase Locked Loop with the Ability to Accurately Apply Phase Offset...
- Publication number 20150207619
- Publication date Jul 23, 2015
- MICROSEMI SEMICONDUCTOR ULC
- Paul H.L.M. SCHRAM
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PHASE LOCKED LOOP WITH SIMULTANEOUS LOCKING TO LOW AND HIGH FREQUEN...
- Publication number 20140320181
- Publication date Oct 30, 2014
- MICROSEMI SEMICONDUCTOR ULC
- Krste Mitric
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE LOCKED LOOP WITH PRECISE PHASE AND FREQUENCY SLOPE LIMITER
- Publication number 20140320186
- Publication date Oct 30, 2014
- MICROSEMI SEMICONDUCTOR ULC
- Q. Gary Jin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL FM RADIO TRANSMITTER
- Publication number 20090081969
- Publication date Mar 26, 2009
- Zarlink Semiconductor Inc.
- Slobodan Milijevic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITALLY CONTROLLED OSCILLATOR WITH JITTER SHAPING CAPABILITY
- Publication number 20070262822
- Publication date Nov 15, 2007
- Zarlink Semiconductor Inc.
- Krste Mitric
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital phase locked loop with selectable normal or fast-locking ca...
- Publication number 20050258908
- Publication date Nov 24, 2005
- Zarlink Semiconductor Inc.
- Krste Mitric
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Digital Phase-Locked Loop with Master-Slave Modes
- Publication number 20040208256
- Publication date Oct 21, 2004
- Menno Tjeerd Spijker
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Krste Mitric

Person

Patents Grantslast 30 patents

Circuit and method for generating temperature-stable clocks using o...

Time-to-digital converter with phase-scaled course-fine resolution

PLL system with master and slave devices

Hardware delay compensation in digital phase locked loop

Apparatus for generating clock signals having a PLL part and synthe...

Phase locked loop with jump-free holdover mode

Phase locked loop with accurate alignment among output clocks

Phase locked loop with the ability to accurately apply phase offset...

Phase locked loop with precise phase and frequency slope limiter

Phase locked loop with simultaneous locking to low and high frequen...

Digital FM radio transmitter

Digitally controlled oscillator with jitter shaping capability

Digital phase-locked loop with master-slave modes

Digital phase locked loop with selectable normal or fast-locking ca...

Patents Applicationslast 30 patents

TIME-TO-DIGITAL CONVERTER WITH PHASE-SCALED COURSE-FINE RESOLUTION

Phase Locked Loop with Accurate Alignment among Output Clocks

PLL SYSTEM WITH MASTER AND SLAVE DEVICES

Apparatus for Generating Clock Signals having a PLL part and Synthe...

Hardware Delay Compensation in Digital Phase Locked Loop

Phase Locked Loop with Jump-Free Holdover Mode

Phase Locked Loop with the Ability to Accurately Apply Phase Offset...

PHASE LOCKED LOOP WITH SIMULTANEOUS LOCKING TO LOW AND HIGH FREQUEN...

PHASE LOCKED LOOP WITH PRECISE PHASE AND FREQUENCY SLOPE LIMITER

DIGITAL FM RADIO TRANSMITTER

DIGITALLY CONTROLLED OSCILLATOR WITH JITTER SHAPING CAPABILITY

Digital phase locked loop with selectable normal or fast-locking ca...

Digital Phase-Locked Loop with Master-Slave Modes