Kuan Hua Tan

Person

Coquitlam, CA

People

Patents Grantslast 30 patents

Information Patent Grant
End-to-end data protection for far memory data transfer from host t...
- Patent number 11,947,995
- Issue date Apr 2, 2024
- Intel Corporation
- Kuan Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sideband signaling over existing auxiliary pins of an interface
- Patent number 11,907,035
- Issue date Feb 20, 2024
- Intel Corporation
- Ang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic presentation of interconnect protocol capability structures
- Patent number 11,704,275
- Issue date Jul 18, 2023
- Intel Corporation
- Kuan Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of optimizing device power and efficiency based on host-cont...
- Patent number 11,625,084
- Issue date Apr 11, 2023
- Intel Corporation
- Kuan Hau Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Securely providing multiple wake-up time options for PCI Express
- Patent number 11,307,638
- Issue date Apr 19, 2022
- Intel Corporation
- Ang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic presentation of interconnect protocol capability structures
- Patent number 11,080,223
- Issue date Aug 3, 2021
- Intel Corporation
- Kuan Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory resource allocation in an end-point device
- Patent number 11,038,749
- Issue date Jun 15, 2021
- Intel Corporation
- Ang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing multiple low power link state wake-up options
- Patent number 10,977,197
- Issue date Apr 13, 2021
- Intel Corporation
- Kuan Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transfer method and apparatus for differential data granularities
- Patent number 10,942,672
- Issue date Mar 9, 2021
- Intel Corporation
- Shrinivas Venkatraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Port mirroring for peripheral component interconnect express devices
- Patent number 10,114,790
- Issue date Oct 30, 2018
- Microsemi Solutions (U.S.), Inc.
- Kiran Hanchinal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross clock compensation between layers in peripheral component int...
- Patent number 9,880,949
- Issue date Jan 30, 2018
- Microsemi Solutions (U.S.), Inc.
- Kiran Hanchinal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and switch for transferring transactions between switch domains
- Patent number 9,753,880
- Issue date Sep 5, 2017
- Microsemi Solutions (U.S.), Inc.
- Richard David Sodke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and switch for transferring transactions between switch domains
- Patent number 9,336,173
- Issue date May 10, 2016
- Microsemi Storage Solutions (U.S.), Inc.
- Richard David Sodke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for a multi-engine descriptor controller for d...
- Patent number 8,782,295
- Issue date Jul 15, 2014
- PMC-Sierra US, Inc.
- Chetan Paragaonkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for a multi-engine descriptor controller for d...
- Patent number 8,601,169
- Issue date Dec 3, 2013
- PMC-Sierra US, Inc.
- Chetan Paragaonkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for queue ordering in a multi-engine processin...
- Patent number 8,559,439
- Issue date Oct 15, 2013
- PMC-Sierra US, Inc.
- Anil B. Dongare
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Galois field multiplier system and method
- Patent number 8,099,655
- Issue date Jan 17, 2012
- PMC-Sierra US, Inc.
- Kuan Hua Tan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Connection management in serial attached SCSI (SAS) expanders
- Patent number 8,095,722
- Issue date Jan 10, 2012
- PMC-Sierra US, Inc.
- Heng Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial attached SCSI broadcast primitive processor filtering for lo...
- Patent number 8,089,902
- Issue date Jan 3, 2012
- PMC-Sierra US, Inc.
- Heng Liao
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for finding subset maxima and minima in SAS ex...
- Patent number 7,958,295
- Issue date Jun 7, 2011
- PMC-Sierra US, Inc.
- Heng Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Connection management in serial attached SCSI (SAS) expanders
- Patent number 7,584,319
- Issue date Sep 1, 2009
- PMC-Sierra, Inc.
- Heng Liao
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-LEVEL MEMORY SYSTEM POWER MANAGEMENT APPARATUS AND METHOD
- Publication number 20220197519
- Publication date Jun 23, 2022
- Intel Corporation
- Chia-Hung Kuo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PRESENTATION OF INTERCONNECT PROTOCOL CAPABILITY STRUCTURES
- Publication number 20210357350
- Publication date Nov 18, 2021
- Intel Corporation
- Kuan Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIDEBAND SIGNALING OVER EXISTING AUXILIARY PINS OF AN INTERFACE
- Publication number 20200278733
- Publication date Sep 3, 2020
- Intel Corporation
- Ang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
END-TO-END DATA PROTECTION FOR FAR MEMORY DATA TRANSFER FROM HOST T...
- Publication number 20200278883
- Publication date Sep 3, 2020
- Intel Corporation
- Kuan Hua TAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF OPTIMIZING DEVICE POWER AND EFFICIENCY BASED ON HOST-CONT...
- Publication number 20190369703
- Publication date Dec 5, 2019
- Kuan Hau Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PRESENTATION OF INTERCONNECT PROTOCOL CAPABILITY STRUCTURES
- Publication number 20190340148
- Publication date Nov 7, 2019
- Intel Corporation
- Kuan Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Transfer Method and Apparatus for Differential Data Granularities
- Publication number 20190278513
- Publication date Sep 12, 2019
- Shrinivas Venkatraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURELY PROVIDING MULTIPLE WAKE-UP TIME OPTIONS FOR PCI EXPRESS
- Publication number 20190235612
- Publication date Aug 1, 2019
- Ang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING MULTIPLE LOW POWER LINK STATE WAKE-UP OPTIONS
- Publication number 20190220422
- Publication date Jul 18, 2019
- Intel Corporation
- Kuan Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY RESOURCE ALLOCATION IN AN END-POINT DEVICE
- Publication number 20190132198
- Publication date May 2, 2019
- Intel Corporation
- Ang LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONVEYING EARLY HINT INFORMATION FOR PHYSICAL LINK STATE CHANGES
- Publication number 20190114281
- Publication date Apr 18, 2019
- Intel Corporation
- Ang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROOT COMPLEX INTEGRATED ENDPOINT EMULATION OF A DISCREET PCIE ENDPOINT
- Publication number 20190095554
- Publication date Mar 28, 2019
- Intel Corporation
- Eng Hun Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OVERLOADING MEMORY ADDRESS FIELDS WHILE MAINTAINING ADDRESS BOUNDAR...
- Publication number 20190042155
- Publication date Feb 7, 2019
- Intel Corporation
- Eng Hun Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PORT MIRRORING FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS DEVICES
- Publication number 20170337152
- Publication date Nov 23, 2017
- Microsemi Storage Solutions (U.S.), Inc.
- Kiran HANCHINAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR A MULTI-ENGINE DESCRIPTOR CONTROLLER
- Publication number 20140095737
- Publication date Apr 3, 2014
- PMC-SIERRA US, INC.
- Chetan PARAGAONKAR
- G06 - COMPUTING CALCULATING COUNTING

Kuan Hua Tan

Person

Patents Grantslast 30 patents

End-to-end data protection for far memory data transfer from host t...

Sideband signaling over existing auxiliary pins of an interface

Dynamic presentation of interconnect protocol capability structures

Method of optimizing device power and efficiency based on host-cont...

Securely providing multiple wake-up time options for PCI Express

Dynamic presentation of interconnect protocol capability structures

Memory resource allocation in an end-point device

Providing multiple low power link state wake-up options

Data transfer method and apparatus for differential data granularities

Port mirroring for peripheral component interconnect express devices

Cross clock compensation between layers in peripheral component int...

Method and switch for transferring transactions between switch domains

Method and switch for transferring transactions between switch domains

Method and apparatus for a multi-engine descriptor controller for d...

Method and apparatus for a multi-engine descriptor controller for d...

Method and apparatus for queue ordering in a multi-engine processin...

Galois field multiplier system and method

Connection management in serial attached SCSI (SAS) expanders

Serial attached SCSI broadcast primitive processor filtering for lo...

Method and apparatus for finding subset maxima and minima in SAS ex...

Connection management in serial attached SCSI (SAS) expanders

Patents Applicationslast 30 patents

MULTI-LEVEL MEMORY SYSTEM POWER MANAGEMENT APPARATUS AND METHOD

DYNAMIC PRESENTATION OF INTERCONNECT PROTOCOL CAPABILITY STRUCTURES

SIDEBAND SIGNALING OVER EXISTING AUXILIARY PINS OF AN INTERFACE

END-TO-END DATA PROTECTION FOR FAR MEMORY DATA TRANSFER FROM HOST T...

METHOD OF OPTIMIZING DEVICE POWER AND EFFICIENCY BASED ON HOST-CONT...

DYNAMIC PRESENTATION OF INTERCONNECT PROTOCOL CAPABILITY STRUCTURES

Data Transfer Method and Apparatus for Differential Data Granularities

SECURELY PROVIDING MULTIPLE WAKE-UP TIME OPTIONS FOR PCI EXPRESS

PROVIDING MULTIPLE LOW POWER LINK STATE WAKE-UP OPTIONS

MEMORY RESOURCE ALLOCATION IN AN END-POINT DEVICE

CONVEYING EARLY HINT INFORMATION FOR PHYSICAL LINK STATE CHANGES

ROOT COMPLEX INTEGRATED ENDPOINT EMULATION OF A DISCREET PCIE ENDPOINT

OVERLOADING MEMORY ADDRESS FIELDS WHILE MAINTAINING ADDRESS BOUNDAR...

PORT MIRRORING FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS DEVICES

METHOD AND APPARATUS FOR A MULTI-ENGINE DESCRIPTOR CONTROLLER