KUMAR ABHISHEK

Person

AUSTIN, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fault detection during entry to or exit from low power mode
- Patent number 12,124,309
- Issue date Oct 22, 2024
- NXP USA, INC.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power supply handling for multiple package configurations
- Patent number 11,994,888
- Issue date May 28, 2024
- NXP USA, INC.
- Kumar Abhishek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Testing of on-chip analog-mixed signal circuits using on-chip memory
- Patent number 11,961,577
- Issue date Apr 16, 2024
- NXP USA, INC.
- Kumar Abhishek
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for detecting faults in an analog input/output...
- Patent number 11,561,255
- Issue date Jan 24, 2023
- NXP USA, INC.
- Kumar Abhishek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit configured to determine a test voltage suitable for very lo...
- Patent number 11,519,960
- Issue date Dec 6, 2022
- NXP USA, INC.
- Srikanth Jagannathan
- G01 - MEASURING TESTING
Information Patent Grant
Analog-to-digital converter (ADC) testing
- Patent number 11,489,535
- Issue date Nov 1, 2022
- NXP B.V.
- Xiankun Jin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Protection circuit
- Patent number 11,196,411
- Issue date Dec 7, 2021
- NXP USA, INC.
- Srikanth Jagannathan
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Pad protection in an integrated circuit
- Patent number 11,146,057
- Issue date Oct 12, 2021
- NXP USA, INC.
- Kumar Abhishek
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Stress test on circuit with low voltage transistor
- Patent number 11,099,231
- Issue date Aug 24, 2021
- NXP USA, INC.
- Srikanth Jagannathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Differential output driver circuit and method of operation
- Patent number 11,075,636
- Issue date Jul 27, 2021
- NXP USA, INC.
- Kumar Abhishek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low power mode testing in an integrated circuit
- Patent number 11,047,904
- Issue date Jun 29, 2021
- NXP USA, INC.
- Kumar Abhishek
- G01 - MEASURING TESTING
Information Patent Grant
Embedded continuity test circuit
- Patent number 10,955,467
- Issue date Mar 23, 2021
- NXP USA, INC.
- Kumar Abhishek
- G01 - MEASURING TESTING
Information Patent Grant
Transmitter circuit having a pre-emphasis driver circuit
- Patent number 10,734,974
- Issue date Aug 4, 2020
- NXP USA, INC.
- Srikanth Jagannathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Amplifier with hysteresis
- Patent number 10,418,952
- Issue date Sep 17, 2019
- NXP USA, INC.
- Kumar Abhishek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fault detection in a low voltage differential signaling (LVDS) system
- Patent number 10,361,732
- Issue date Jul 23, 2019
- NXP USA, INC.
- Srikanth Jagannathan
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Analog-to-digital conversion with sampling capacitor pre-charging
- Patent number 10,312,929
- Issue date Jun 4, 2019
- NXP USA, INC.
- Kumar Abhishek
- G11 - INFORMATION STORAGE
Information Patent Grant
Active tamper detection circuit with bypass detection and method th...
- Patent number 10,242,955
- Issue date Mar 26, 2019
- NXP USA, INC.
- Mohit Arora
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Level shifter having constant duty cycle across process, voltage, a...
- Patent number 10,205,441
- Issue date Feb 12, 2019
- NXP USA, INC.
- Kumar Abhishek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for self-testing an integrated circuit
- Patent number 10,191,110
- Issue date Jan 29, 2019
- NXP USA, INC.
- Kumar Abhishek
- G05 - CONTROLLING REGULATING
Information Patent Grant
Robust boot block design and architecture
- Patent number 10,157,087
- Issue date Dec 18, 2018
- NXP USA, INC.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuitry and methods for reducing leakage current
- Patent number 10,153,768
- Issue date Dec 11, 2018
- NXP USA, INC.
- Christopher James Micielli
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On chip adaptive jitter reduction hardware method for LVDS systems
- Patent number 10,148,261
- Issue date Dec 4, 2018
- NXP USA, INC.
- Srikanth Jagannathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Devices and methods for power sequence detection
- Patent number 10,013,042
- Issue date Jul 3, 2018
- NXP USA, INC.
- Kumar Abhishek
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for managing reset
- Patent number 9,697,065
- Issue date Jul 4, 2017
- NXP USA, INC.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with scan chain having dual-edge triggered scann...
- Patent number 9,599,672
- Issue date Mar 21, 2017
- NXP USA, INC.
- Kumar Abhishek
- G01 - MEASURING TESTING
Information Patent Grant
Devices and methods with capacitive storage for latch redundancy
- Patent number 9,559,671
- Issue date Jan 31, 2017
- NXP USA, INC.
- Srikanth Jagannathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scannable flip-flop and low power scan-shift mode operation in a da...
- Patent number 9,473,121
- Issue date Oct 18, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Kumar Abhishek
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
ON-CHIP FAULT DETECTION DUE TO MALFUNCTIONS ON CHIP PINS
- Publication number 20240353479
- Publication date Oct 24, 2024
- NXP USA, Inc.
- Kumar Abhishek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ARCHITECTURE FOR MANAGING ASYNCHRONOUS RESETS IN A SYSTEM-ON-A-CHIP
- Publication number 20240192745
- Publication date Jun 13, 2024
- NXP USA, Inc.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAULT DETECTION DURING ENTRY TO OR EXIT FROM LOW POWER MODE
- Publication number 20240160265
- Publication date May 16, 2024
- NXP USA, Inc.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER SUPPLY HANDLING FOR MULTIPLE PACKAGE CONFIGURATIONS
- Publication number 20240019883
- Publication date Jan 18, 2024
- NXP USA, Inc.
- Kumar Abhishek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TESTING OF ON-CHIP ANALOG-MIXED SIGNAL CIRCUITS USING ON-CHIP MEMORY
- Publication number 20240013848
- Publication date Jan 11, 2024
- NXP USA, Inc.
- Kumar Abhishek
- G11 - INFORMATION STORAGE
Information Patent Application
DIFFERENTIAL INPUT RECEIVER CIRCUIT TESTING WITH A LOOPBACK CIRCUIT
- Publication number 20230033973
- Publication date Feb 2, 2023
- Kumar Abhishek
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ANALOG-TO-DIGITAL CONVERTER (ADC) TESTING
- Publication number 20220368338
- Publication date Nov 17, 2022
- NXP B.V.
- Xiankun Jin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS AND METHODS FOR DETECTING FAULTS IN AN ANALOG INPUT/OUTPUT...
- Publication number 20220334176
- Publication date Oct 20, 2022
- Kumar Abhishek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CIRCUIT CONFIGURED TO DETERMINE A TEST VOLTAGE SUITABLE FOR VERY LO...
- Publication number 20220057448
- Publication date Feb 24, 2022
- NXP USA, Inc.
- Srikanth Jagannathan
- G01 - MEASURING TESTING
Information Patent Application
STRESS TEST ON CIRCUIT WITH LOW VOLTAGE TRANSISTOR
- Publication number 20210096170
- Publication date Apr 1, 2021
- NXP USA, Inc.
- Srikanth Jagannathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW POWER MODE TESTING IN AN INTEGRATED CIRCUIT
- Publication number 20200284830
- Publication date Sep 10, 2020
- NXP USA, Inc.
- Kumar ABHISHEK
- G01 - MEASURING TESTING
Information Patent Application
PROTECTION CIRCUIT
- Publication number 20200259487
- Publication date Aug 13, 2020
- NXP USA, Inc.
- Srikanth Jagannathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
EMBEDDED CONTINUITY TEST CIRCUIT
- Publication number 20200191862
- Publication date Jun 18, 2020
- NXP USA, Inc.
- Kumar ABHISHEK
- G01 - MEASURING TESTING
Information Patent Application
PAD PROTECTION IN AN INTEGRATED CIRCUIT
- Publication number 20200136373
- Publication date Apr 30, 2020
- NXP USA, Inc.
- KUMAR ABHISHEK
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
AMPLIFIER WITH HYSTERESIS
- Publication number 20190288654
- Publication date Sep 19, 2019
- NXP USA, Inc.
- KUMAR ABHISHEK
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ACTIVE TAMPER DETECTION CIRCUIT WITH BYPASS DETECTION AND METHOD TH...
- Publication number 20180061780
- Publication date Mar 1, 2018
- FREESCALE SEMICONDUCTOR, INC.
- MOHIT ARORA
- G01 - MEASURING TESTING
Information Patent Application
APPARATUS AND METHOD FOR SELF-TESTING AN INTEGRATED CIRCUIT
- Publication number 20160231378
- Publication date Aug 11, 2016
- FREESCALE SEMICONDUCTOR, INC.
- KUMAR ABHISHEK
- G01 - MEASURING TESTING

KUMAR ABHISHEK

Person

Patents Grantslast 30 patents

Fault detection during entry to or exit from low power mode

Power supply handling for multiple package configurations

Testing of on-chip analog-mixed signal circuits using on-chip memory

Systems and methods for detecting faults in an analog input/output...

Circuit configured to determine a test voltage suitable for very lo...

Analog-to-digital converter (ADC) testing

Protection circuit

Pad protection in an integrated circuit

Stress test on circuit with low voltage transistor

Differential output driver circuit and method of operation

Low power mode testing in an integrated circuit

Embedded continuity test circuit

Transmitter circuit having a pre-emphasis driver circuit

Amplifier with hysteresis

Fault detection in a low voltage differential signaling (LVDS) system

Analog-to-digital conversion with sampling capacitor pre-charging

Active tamper detection circuit with bypass detection and method th...

Level shifter having constant duty cycle across process, voltage, a...

Apparatus and method for self-testing an integrated circuit

Robust boot block design and architecture

Integrated circuitry and methods for reducing leakage current

On chip adaptive jitter reduction hardware method for LVDS systems

Devices and methods for power sequence detection

Systems and methods for managing reset

Integrated circuit with scan chain having dual-edge triggered scann...

Devices and methods with capacitive storage for latch redundancy

Scannable flip-flop and low power scan-shift mode operation in a da...

Patents Applicationslast 30 patents

ON-CHIP FAULT DETECTION DUE TO MALFUNCTIONS ON CHIP PINS

ARCHITECTURE FOR MANAGING ASYNCHRONOUS RESETS IN A SYSTEM-ON-A-CHIP

FAULT DETECTION DURING ENTRY TO OR EXIT FROM LOW POWER MODE

POWER SUPPLY HANDLING FOR MULTIPLE PACKAGE CONFIGURATIONS

TESTING OF ON-CHIP ANALOG-MIXED SIGNAL CIRCUITS USING ON-CHIP MEMORY

DIFFERENTIAL INPUT RECEIVER CIRCUIT TESTING WITH A LOOPBACK CIRCUIT

ANALOG-TO-DIGITAL CONVERTER (ADC) TESTING

SYSTEMS AND METHODS FOR DETECTING FAULTS IN AN ANALOG INPUT/OUTPUT...

CIRCUIT CONFIGURED TO DETERMINE A TEST VOLTAGE SUITABLE FOR VERY LO...

STRESS TEST ON CIRCUIT WITH LOW VOLTAGE TRANSISTOR

LOW POWER MODE TESTING IN AN INTEGRATED CIRCUIT

PROTECTION CIRCUIT

EMBEDDED CONTINUITY TEST CIRCUIT

PAD PROTECTION IN AN INTEGRATED CIRCUIT

AMPLIFIER WITH HYSTERESIS

ACTIVE TAMPER DETECTION CIRCUIT WITH BYPASS DETECTION AND METHOD TH...

APPARATUS AND METHOD FOR SELF-TESTING AN INTEGRATED CIRCUIT