KuoPei LU

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Hsinchu, TW

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Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit layout generation method
- Patent number 11,907,636
- Issue date Feb 20, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ke-Ying Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit layout generation method and system
- Patent number 11,392,749
- Issue date Jul 19, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ke-Ying Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit modeling methods and systems
- Patent number 10,846,456
- Issue date Nov 24, 2020
- Taiwan Semiconductor Manufacturing Company Ltd.
- Ke-Ying Su
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT LAYOUT GENERATION METHOD
- Publication number 20240160828
- Publication date May 16, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT LAYOUT GENERATION METHOD
- Publication number 20220343054
- Publication date Oct 27, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM
- Publication number 20210073454
- Publication date Mar 11, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT MODELING METHODS AND SYSTEMS
- Publication number 20190340328
- Publication date Nov 7, 2019
- Taiwan Semiconductor Manufacturing company Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING