Kurt A. Feiste

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Processor providing intelligent management of values buffered in ov...
- Patent number 11,327,757
- Issue date May 10, 2022
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction dispatch routing
- Patent number 11,327,766
- Issue date May 10, 2022
- International Business Machines Corporation
- Eric Mark Schwarz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redistribution of architected states for a processor register file
- Patent number 11,144,319
- Issue date Oct 12, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel dispatching of multi-operation instructions in a multi-sli...
- Patent number 10,970,079
- Issue date Apr 6, 2021
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction chaining
- Patent number 10,936,321
- Issue date Mar 2, 2021
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dispatching, allocating, and deallocating instructions with real/vi...
- Patent number 10,877,763
- Issue date Dec 29, 2020
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel slice processor shadowing states of hardware threads acros...
- Patent number 10,838,728
- Issue date Nov 17, 2020
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing load-hit-store ha...
- Patent number 10,740,107
- Issue date Aug 11, 2020
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-overhead, low-latency operand dependency tracking for instructi...
- Patent number 10,671,398
- Issue date Jun 2, 2020
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-overhead, low-latency operand dependency tracking for instructi...
- Patent number 10,671,399
- Issue date Jun 2, 2020
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel dispatching of multi-operation instructions in a multi-sli...
- Patent number 10,496,412
- Issue date Dec 3, 2019
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing datapath steering
- Patent number 10,437,756
- Issue date Oct 8, 2019
- International Business Machines Corporation
- Steven R. Carlough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing datapath steering
- Patent number 10,417,152
- Issue date Sep 17, 2019
- International Business Machines Corporation
- Steven R. Carlough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supporting even instruction tag (‘ITAG’) requirements in a multi-sl...
- Patent number 10,120,683
- Issue date Nov 6, 2018
- International Business Machines Corporation
- Steven R. Carlough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel slice processor shadowing states of hardware threads acros...
- Patent number 10,102,001
- Issue date Oct 16, 2018
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Execution slice with supplemental instruction port for an instructi...
- Patent number 9,977,677
- Issue date May 22, 2018
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor with history buffers storing t...
- Patent number 9,971,687
- Issue date May 15, 2018
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Issue unit for placing a processor into a gradual slow mode of oper...
- Patent number 8,200,946
- Issue date Jun 12, 2012
- International Business Machines Corporation
- Christopher M. Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating a flush vector from a first execution unit directly to e...
- Patent number 8,082,423
- Issue date Dec 20, 2011
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Information handling system with real and virtual load/store instru...
- Patent number 8,041,928
- Issue date Oct 18, 2011
- International Business Machines Corporation
- William E. Burky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for delaying a load miss flush until issuing t...
- Patent number 7,953,960
- Issue date May 31, 2011
- International Business Machines Corporation
- Kurt Alan Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for determining multiple unused registers in a pr...
- Patent number 7,949,857
- Issue date May 24, 2011
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor livelock recovery by gradual stalling of instruction proc...
- Patent number 7,818,544
- Issue date Oct 19, 2010
- International Business Machines Corporation
- Christopher M. Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Issue unit for placing a processor into a gradual slow mode of oper...
- Patent number 7,437,539
- Issue date Oct 14, 2008
- International Business Machines Corporation
- Christopher M. Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Placing a processor into a gradual slow mode of operation in respon...
- Patent number 7,434,033
- Issue date Oct 7, 2008
- International Business Machines Corporation
- Christopher M. Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to detect a stalled instruction stream and serialize micro-o...
- Patent number 7,412,589
- Issue date Aug 12, 2008
- International Business Machines Corporation
- Kurt Alan Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for high frequency stall design
- Patent number 7,370,176
- Issue date May 6, 2008
- International Business Machines Corporation
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for issuing instructions from an issue queue i...
- Patent number 7,350,056
- Issue date Mar 25, 2008
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to reduce instruction cache miss penalties and methods th...
- Patent number 6,658,534
- Issue date Dec 2, 2003
- International Business Machines Corporation
- Steven Wayne White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for store forwarding assigning load and store instructions t...
- Patent number 6,349,382
- Issue date Feb 19, 2002
- International Business Machines Corporation
- Kurt Alan Feiste
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ROUTING INSTRUCTION RESULTS TO A REGISTER BLOCK OF A SUBDIVIDED REG...
- Publication number 20230068637
- Publication date Mar 2, 2023
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION DISPATCH ROUTING
- Publication number 20220035636
- Publication date Feb 3, 2022
- International Business Machines Corporation
- Eric Mark Schwarz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR PROVIDING INTELLIGENT MANAGEMENT OF VALUES BUFFERED IN OV...
- Publication number 20210342150
- Publication date Nov 4, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION CHAINING
- Publication number 20200249954
- Publication date Aug 6, 2020
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL DISPATCHING OF MULTI-OPERATION INSTRUCTIONS IN A MULTI-SLI...
- Publication number 20200042320
- Publication date Feb 6, 2020
- International Business Machines Corporation
- KURT A. FEISTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dispatching, Allocating, and Deallocating Instructions in a Queue i...
- Publication number 20200042319
- Publication date Feb 6, 2020
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING DATAPATH STEERING
- Publication number 20190294571
- Publication date Sep 26, 2019
- International Business Machines Corporation
- STEVEN R. CARLOUGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-OVERHEAD, LOW-LATENCY OPERAND DEPENDENCY TRACKING FOR INSTRUCTI...
- Publication number 20190042268
- Publication date Feb 7, 2019
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-OVERHEAD, LOW-LATENCY OPERAND DEPENDENCY TRACKING FOR INSTRUCTI...
- Publication number 20190042267
- Publication date Feb 7, 2019
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROTATIONAL DISPATCH FOR PARALLEL SLICE PROCESSOR
- Publication number 20190026112
- Publication date Jan 24, 2019
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL SLICE PROCESSOR SHADOWING STATES OF HARDWARE THREADS ACROS...
- Publication number 20180217842
- Publication date Aug 2, 2018
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING INSTRUCTION FUSION
- Publication number 20180107510
- Publication date Apr 19, 2018
- International Business Machines Corporation
- STEVEN R. CARLOUGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADMINISTERING INSTRUCTION TAGS IN A COMPUTER PROCESSOR
- Publication number 20180004516
- Publication date Jan 4, 2018
- International Business Machines Corporation
- KURT A. FEISTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING DATAPATH STEERING
- Publication number 20170351524
- Publication date Dec 7, 2017
- International Business Machines Corporation
- STEVEN R. CARLOUGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING LOAD-HIT-STORE HA...
- Publication number 20170351522
- Publication date Dec 7, 2017
- International Business Machines Corporation
- SALMA AYUB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING DATAPATH STEERING
- Publication number 20170351523
- Publication date Dec 7, 2017
- International Business Machines Corporation
- STEVEN R. CARLOUGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPORTING EVEN INSTRUCTION TAG ('ITAG') REQUIREMENTS IN A MULTI-SL...
- Publication number 20170315809
- Publication date Nov 2, 2017
- International Business Machines Corporation
- STEVEN R. CARLOUGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROTATIONAL DISPATCH FOR PARALLEL SLICE PROCESSOR
- Publication number 20170293488
- Publication date Oct 12, 2017
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR WITH HISTORY BUFFERS STORING T...
- Publication number 20170235674
- Publication date Aug 17, 2017
- International Business Machines Corporation
- BRIAN D. BARRICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL DISPATCHING OF MULTI-OPERATION INSTRUCTIONS IN A MULTI-SLI...
- Publication number 20170228234
- Publication date Aug 10, 2017
- International Business Machines Corporation
- KURT A. FEISTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INFORMATION HANDLING SYSTEM WITH REAL AND VIRTUAL LOAD/STORE INSTRU...
- Publication number 20100161945
- Publication date Jun 24, 2010
- International Business Machines Corporation
- William E. Burky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR DETERMINING MULTIPLE UNUSED REGISTERS IN A PR...
- Publication number 20090259815
- Publication date Oct 15, 2009
- International Business Machines Corporation
- KURT A. FEISTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanisms for Placing a Processor into a Gradual Slow Mode of Oper...
- Publication number 20090006817
- Publication date Jan 1, 2009
- International Business Machines Corporation
- Christopher M. Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Issue Unit for Placing a Processor into a Gradual Slow Mode of Oper...
- Publication number 20090006820
- Publication date Jan 1, 2009
- International Business Machines Corporation
- Christopher M. Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method to Detect a Stalled Instruction Stream and Serialize Micro-O...
- Publication number 20080294885
- Publication date Nov 27, 2008
- International Business Machines Corporation
- Kurt Alan Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High Frequency Stall Design
- Publication number 20080148021
- Publication date Jun 19, 2008
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ISSUE UNIT FOR PLACING A PROCESSOR INTO A GRADUAL SLOW MODE OF OPER...
- Publication number 20070245129
- Publication date Oct 18, 2007
- Christopher M. Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR PLACING A PROCESSOR INTO A GRADUAL SLOW MODE...
- Publication number 20070245350
- Publication date Oct 18, 2007
- Christopher M. Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method to Detect a Stalled Instruction Stream and Serialize Micro-O...
- Publication number 20070234018
- Publication date Oct 4, 2007
- Kurt Alan Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for distributing flush instructions
- Publication number 20070198814
- Publication date Aug 23, 2007
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING

Kurt A. Feiste

Person

Patents Grantslast 30 patents

Processor providing intelligent management of values buffered in ov...

Instruction dispatch routing

Redistribution of architected states for a processor register file

Parallel dispatching of multi-operation instructions in a multi-sli...

Instruction chaining

Dispatching, allocating, and deallocating instructions with real/vi...

Parallel slice processor shadowing states of hardware threads acros...

Operation of a multi-slice processor implementing load-hit-store ha...

Low-overhead, low-latency operand dependency tracking for instructi...

Low-overhead, low-latency operand dependency tracking for instructi...

Parallel dispatching of multi-operation instructions in a multi-sli...

Operation of a multi-slice processor implementing datapath steering

Operation of a multi-slice processor implementing datapath steering

Supporting even instruction tag (‘ITAG’) requirements in a multi-sl...

Parallel slice processor shadowing states of hardware threads acros...

Execution slice with supplemental instruction port for an instructi...

Operation of a multi-slice processor with history buffers storing t...

Issue unit for placing a processor into a gradual slow mode of oper...

Generating a flush vector from a first execution unit directly to e...

Information handling system with real and virtual load/store instru...

Method and apparatus for delaying a load miss flush until issuing t...

Method and system for determining multiple unused registers in a pr...

Processor livelock recovery by gradual stalling of instruction proc...

Issue unit for placing a processor into a gradual slow mode of oper...

Placing a processor into a gradual slow mode of operation in respon...

Method to detect a stalled instruction stream and serialize micro-o...

System and method for high frequency stall design

Method and apparatus for issuing instructions from an issue queue i...

Mechanism to reduce instruction cache miss penalties and methods th...

System for store forwarding assigning load and store instructions t...

Patents Applicationslast 30 patents

ROUTING INSTRUCTION RESULTS TO A REGISTER BLOCK OF A SUBDIVIDED REG...

INSTRUCTION DISPATCH ROUTING

PROCESSOR PROVIDING INTELLIGENT MANAGEMENT OF VALUES BUFFERED IN OV...

INSTRUCTION CHAINING

PARALLEL DISPATCHING OF MULTI-OPERATION INSTRUCTIONS IN A MULTI-SLI...

Dispatching, Allocating, and Deallocating Instructions in a Queue i...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING DATAPATH STEERING

LOW-OVERHEAD, LOW-LATENCY OPERAND DEPENDENCY TRACKING FOR INSTRUCTI...

LOW-OVERHEAD, LOW-LATENCY OPERAND DEPENDENCY TRACKING FOR INSTRUCTI...

ROTATIONAL DISPATCH FOR PARALLEL SLICE PROCESSOR

PARALLEL SLICE PROCESSOR SHADOWING STATES OF HARDWARE THREADS ACROS...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING INSTRUCTION FUSION

ADMINISTERING INSTRUCTION TAGS IN A COMPUTER PROCESSOR

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING DATAPATH STEERING

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING LOAD-HIT-STORE HA...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING DATAPATH STEERING

SUPPORTING EVEN INSTRUCTION TAG ('ITAG') REQUIREMENTS IN A MULTI-SL...

ROTATIONAL DISPATCH FOR PARALLEL SLICE PROCESSOR

OPERATION OF A MULTI-SLICE PROCESSOR WITH HISTORY BUFFERS STORING T...

PARALLEL DISPATCHING OF MULTI-OPERATION INSTRUCTIONS IN A MULTI-SLI...

INFORMATION HANDLING SYSTEM WITH REAL AND VIRTUAL LOAD/STORE INSTRU...

METHOD AND SYSTEM FOR DETERMINING MULTIPLE UNUSED REGISTERS IN A PR...

Mechanisms for Placing a Processor into a Gradual Slow Mode of Oper...

Issue Unit for Placing a Processor into a Gradual Slow Mode of Oper...

Method to Detect a Stalled Instruction Stream and Serialize Micro-O...

High Frequency Stall Design

ISSUE UNIT FOR PLACING A PROCESSOR INTO A GRADUAL SLOW MODE OF OPER...

SYSTEM AND METHOD FOR PLACING A PROCESSOR INTO A GRADUAL SLOW MODE...

Method to Detect a Stalled Instruction Stream and Serialize Micro-O...

Method and apparatus for distributing flush instructions