Kwang H. Kim

Person

Irvine, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Low jitter high phase resolution PLL-based timing recovery system
- Patent number 7,636,007
- Issue date Dec 22, 2009
- Broadcom Corporation
- Myles Wakayama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital calibration loop for an analog to digital converter
- Patent number 7,623,050
- Issue date Nov 24, 2009
- Broadcom Corporation
- Michael Le
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Precharged power-down biasing circuit
- Patent number 7,518,435
- Issue date Apr 14, 2009
- Broadcom Corporation
- Kwang Young Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase controlled high speed interfaces
- Patent number 7,515,504
- Issue date Apr 7, 2009
- Broadcom Corporation
- Lionel J. D'Luna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase controlled high speed interfaces
- Patent number 7,333,390
- Issue date Feb 19, 2008
- Broadcom Corporation
- Lionel J. D'Luna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Precharged power-down biasing circuit
- Patent number 7,205,826
- Issue date Apr 17, 2007
- Broadcom Corporation
- Kwang Young Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System to accelerate settling of an amplifier
- Patent number 7,142,057
- Issue date Nov 28, 2006
- Broadcom Corporation
- Josephus A. E. P. Van Engelen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for real-time fault-tolerant multicasts in com...
- Patent number 7,079,535
- Issue date Jul 18, 2006
- The Regents of the Universtiy of California
- Kwang H. Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for delay matching of full and divided clock s...
- Patent number 6,998,885
- Issue date Feb 14, 2006
- Broadcom Corporation
- Kwang Y. Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase controlled high speed interfaces
- Patent number 6,975,557
- Issue date Dec 13, 2005
- Broadcom Corporation
- Lionel J. D'Luna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to accelerate settling of an amplifier
- Patent number 6,963,245
- Issue date Nov 8, 2005
- Broadcom Corporation
- Josephus A. E. P. van Engelen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for delay matching of full and divided clock s...
- Patent number 6,906,564
- Issue date Jun 14, 2005
- Broadcom Corporation
- Kwang Y. Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low jitter high phase resolution PLL-based timing recovery system
- Patent number 6,791,379
- Issue date Sep 14, 2004
- Broadcom Corporation
- Myles Wakayama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for delay matching of full and divided clock s...
- Patent number 6,597,216
- Issue date Jul 22, 2003
- Broadcom Corporation
- Kwang Y. Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for delay matching of full and divided clock s...
- Patent number 6,424,190
- Issue date Jul 23, 2002
- Broadcom Corporation
- Kwang Y. Kim
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Phase Controlled High Speed Interfaces
- Publication number 20080101526
- Publication date May 1, 2008
- BROADCOM CORPORATION
- Lionel J. D'Luna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Precharged power-down biasing circuit
- Publication number 20070194836
- Publication date Aug 23, 2007
- BROADCOM CORPORATION
- Kwang Young Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Digital calibration loop for an analog to digital converter
- Publication number 20070152863
- Publication date Jul 5, 2007
- BROADCOM CORPORATION
- Michael Le
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Voltage controlled oscillator with variable control sensitivity
- Publication number 20070152761
- Publication date Jul 5, 2007
- Broadcom Corporation
- Kwang Young Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Phase controlled high speed interfaces
- Publication number 20060077752
- Publication date Apr 13, 2006
- BROADCOM CORPORATION
- Lionel J. D'Luna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Precharged power-down biasing circuit
- Publication number 20050264344
- Publication date Dec 1, 2005
- BROADCOM CORPORATION
- Kwang Young Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System to accelerate settling of an amplifier
- Publication number 20050248406
- Publication date Nov 10, 2005
- BROADCOM CORPORATION
- Josephus A.E.P. van Engelen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Phase controlled high speed interfaces
- Publication number 20050073902
- Publication date Apr 7, 2005
- Broadcom Corporation
- Lionel J. D'Luna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method to accelerate settling of an amplifier
- Publication number 20050046481
- Publication date Mar 3, 2005
- Broadcom Corporation
- Josephus A.E.P. van Engelen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus and method for delay matching of full and divided clock s...
- Publication number 20050040871
- Publication date Feb 24, 2005
- BROADCOM CORPORATION
- Kwang Y. Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low jitter high phase resolution PLL-based timing recovery system
- Publication number 20050030073
- Publication date Feb 10, 2005
- Broadcom Corporation
- Myles Wakayama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus and method for delay matching of full and divided clock s...
- Publication number 20040017240
- Publication date Jan 29, 2004
- Broadcom Corporation
- Kwang Y. Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for delay matching of full and divided clock s...
- Publication number 20030048119
- Publication date Mar 13, 2003
- Broadcom Corporation
- Kwang Y. Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for real-time fault-tolerant multicasts in com...
- Publication number 20020018484
- Publication date Feb 14, 2002
- Kwang H. Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Kwang H. Kim

Person

Patents Grantslast 30 patents

Low jitter high phase resolution PLL-based timing recovery system

Digital calibration loop for an analog to digital converter

Precharged power-down biasing circuit

Phase controlled high speed interfaces

Phase controlled high speed interfaces

Precharged power-down biasing circuit

System to accelerate settling of an amplifier

Method and apparatus for real-time fault-tolerant multicasts in com...

Apparatus and method for delay matching of full and divided clock s...

Phase controlled high speed interfaces

System and method to accelerate settling of an amplifier

Apparatus and method for delay matching of full and divided clock s...

Low jitter high phase resolution PLL-based timing recovery system

Apparatus and method for delay matching of full and divided clock s...

Apparatus and method for delay matching of full and divided clock s...

Patents Applicationslast 30 patents

Phase Controlled High Speed Interfaces

Precharged power-down biasing circuit

Digital calibration loop for an analog to digital converter

Voltage controlled oscillator with variable control sensitivity

Phase controlled high speed interfaces

Precharged power-down biasing circuit

System to accelerate settling of an amplifier

Phase controlled high speed interfaces

System and method to accelerate settling of an amplifier

Apparatus and method for delay matching of full and divided clock s...

Low jitter high phase resolution PLL-based timing recovery system

Apparatus and method for delay matching of full and divided clock s...

Apparatus and method for delay matching of full and divided clock s...

Method and apparatus for real-time fault-tolerant multicasts in com...