Kwang-Ho Kim

Person

Milpitas, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Three-dimensional memory device having support-die-assisted source...
- Patent number 11,791,327
- Issue date Oct 17, 2023
- SanDisk Technologies LLC
- Kwang-Ho Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device with vertical field effect transist...
- Patent number 11,569,215
- Issue date Jan 31, 2023
- SanDisk Technologies LLC
- Kwang-Ho Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded assembly of semiconductor dies containing pad level across-d...
- Patent number 11,342,244
- Issue date May 24, 2022
- SanDisk Technologies LLC
- Jee-Yeon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device with vertical field effect transist...
- Patent number 11,296,113
- Issue date Apr 5, 2022
- SanDisk Technologies LLC
- Kwang-Ho Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device with logic signal routing through a...
- Patent number 11,222,881
- Issue date Jan 11, 2022
- SanDisk Technologies LLC
- Yanli Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device having support-die-assisted source...
- Patent number 11,133,297
- Issue date Sep 28, 2021
- SanDisk Technologies LLC
- Kwang-Ho Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Temperature dependent impedance mitigation in non-volatile memory
- Patent number 11,074,976
- Issue date Jul 27, 2021
- SanDisk Technologies LLC
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Connectivity detection for wafer-to-wafer alignment and bonding
- Patent number 11,031,308
- Issue date Jun 8, 2021
- SanDisk Technologies LLC
- Seungpil Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device including contact-level bit-line-co...
- Patent number 11,011,209
- Issue date May 18, 2021
- SanDisk Technologies LLC
- Jee-Yeon Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Erase operation in 3D NAND
- Patent number 10,923,196
- Issue date Feb 16, 2021
- SanDisk Technologies LLC
- Peter Rabkin
- G11 - INFORMATION STORAGE
Information Patent Grant
Location dependent impedance mitigation in non-volatile memory
- Patent number 10,910,064
- Issue date Feb 2, 2021
- SanDisk Technologies LLC
- Peter Rabkin
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device including signal and power connecti...
- Patent number 10,872,899
- Issue date Dec 22, 2020
- SanDisk Technologies LLC
- Jee-Yeon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device including signal and power connecti...
- Patent number 10,861,873
- Issue date Dec 8, 2020
- SanDisk Technologies LLC
- Jee-Yeon Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Impedance mismatch mitigation scheme that applies asymmetric voltag...
- Patent number 10,755,788
- Issue date Aug 25, 2020
- SanDisk Technologies LLC
- Peter Rabkin
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device containing bond pad-based power sup...
- Patent number 10,748,894
- Issue date Aug 18, 2020
- SanDisk Technologies LLC
- Murshed Chowdhury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device with logic signal routing through a...
- Patent number 10,727,215
- Issue date Jul 28, 2020
- SanDisk Technologies LLC
- Yanli Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Erase operation in 3D NAND flash memory including pathway impedance...
- Patent number 10,650,898
- Issue date May 12, 2020
- SanDisk Technologies LLC
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device having support-die-assisted source...
- Patent number 10,510,738
- Issue date Dec 17, 2019
- SanDisk Technologies LLC
- Kwang-Ho Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fast scan to detect bit line discharge time
- Patent number 9,892,791
- Issue date Feb 13, 2018
- SanDisk Technologies LLC
- Yen-Lung Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Bad column management with bit information in non-volatile memory s...
- Patent number 9,748,001
- Issue date Aug 29, 2017
- SanDisk Technologies LLC
- Yan Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device which performs verify operations using different sens...
- Patent number 9,721,671
- Issue date Aug 1, 2017
- SanDisk Technologies LLC
- Alexander Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier with efficient use of data latches
- Patent number 9,552,882
- Issue date Jan 24, 2017
- SanDisk Technologies LLC
- Tai-Yuan Tseng
- G11 - INFORMATION STORAGE
Information Patent Grant
State-dependent lockout in non-volatile memory
- Patent number 9,437,302
- Issue date Sep 6, 2016
- SanDisk Technologies LLC
- Tai-Yuan Tseng
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line resistance compensation
- Patent number 9,047,954
- Issue date Jun 2, 2015
- SanDisk Technologies Inc.
- Teruhiko Kamei
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line resistance compensation
- Patent number 8,988,917
- Issue date Mar 24, 2015
- SanDisk Technologies Inc.
- Kwang Ho Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line BL isolation scheme during erase operation for non-volatil...
- Patent number 8,937,837
- Issue date Jan 20, 2015
- SanDisk Technologies Inc.
- Mohan Vamsi Dunga
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line resistance compensation
- Patent number 8,908,432
- Issue date Dec 9, 2014
- SanDisk Technologies, Inc
- Teruhiko Kamei
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared bit line string architecture
- Patent number 8,879,331
- Issue date Nov 4, 2014
- SanDisk Technologies Inc.
- Jongsun Sel
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line resistance compensation
- Patent number 8,743,618
- Issue date Jun 3, 2014
- SanDisk Technologies Inc.
- Teruhiko Kamei
- G11 - INFORMATION STORAGE
Information Patent Grant
Bad column management with bit information in non-volatile memory s...
- Patent number 8,711,625
- Issue date Apr 29, 2014
- SanDisk Technologies Inc.
- Yan Li
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SEEDING BIAS CONTROL FOR SUB-BLOCK GROUPS IN A MEMORY DEVICE
- Publication number 20240428862
- Publication date Dec 26, 2024
- Micron Technology, Inc.
- Taehyun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING SENSE AMPLIFIER LATCH AND DATA LATCH VOLTAGE TO REDUCE STA...
- Publication number 20240170075
- Publication date May 23, 2024
- Micron Technology, Inc.
- Kwang Ho Kim
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE WITH VERTICAL FIELD EFFECT TRANSIST...
- Publication number 20220068954
- Publication date Mar 3, 2022
- SANDISK TECHNOLOGIES LLC
- Kwang-Ho KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE WITH VERTICAL FIELD EFFECT TRANSIST...
- Publication number 20220068903
- Publication date Mar 3, 2022
- SANDISK TECHNOLOGIES LLC
- Kwang-Ho KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE HAVING SUPPORT-DIE-ASSISTED SOURCE...
- Publication number 20220013518
- Publication date Jan 13, 2022
- SANDISK TECHNOLOGIES LLC
- Kwang-Ho KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDED ASSEMBLY OF SEMICONDUCTOR DIES CONTAINING PAD LEVEL ACROSS-D...
- Publication number 20210225736
- Publication date Jul 22, 2021
- SANDISK TECHNOLOGIES LLC
- Jee-Yeon KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE INCLUDING CONTACT-LEVEL BIT-LINE-CO...
- Publication number 20210098029
- Publication date Apr 1, 2021
- SANDISK TECHNOLOGIES LLC
- Jee-Yeon KIM
- G11 - INFORMATION STORAGE
Information Patent Application
TEMPERATURE DEPENDENT IMPEDANCE MITIGATION IN NON-VOLATILE MEMORY
- Publication number 20210065802
- Publication date Mar 4, 2021
- SANDISK TECHNOLOGIES LLC
- Peter Rabkin
- G11 - INFORMATION STORAGE
Information Patent Application
CONNECTIVITY DETECTION FOR WAFER-TO-WAFER ALIGNMENT AND BONDING
- Publication number 20200381316
- Publication date Dec 3, 2020
- SANDISK TECHNOLOGIES LLC
- Seungpil Lee
- G01 - MEASURING TESTING
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE INCLUDING SIGNAL AND POWER CONNECTI...
- Publication number 20200357814
- Publication date Nov 12, 2020
- SANDISK TECHNOLOGIES LLC
- Jee-Yeon KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE INCLUDING SIGNAL AND POWER CONNECTI...
- Publication number 20200357811
- Publication date Nov 12, 2020
- SANDISK TECHNOLOGIES LLC
- Jee-Yeon KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE WITH LOGIC SIGNAL ROUTING THROUGH A...
- Publication number 20200343235
- Publication date Oct 29, 2020
- SANDISK TECHNOLOGIES LLC
- Yanli ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE WITH LOGIC SIGNAL ROUTING THROUGH A...
- Publication number 20200243498
- Publication date Jul 30, 2020
- SANDISK TECHNOLOGIES LLC
- Yanli ZHANG
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE CONTAINING BOND PAD-BASED POWER SUP...
- Publication number 20200235090
- Publication date Jul 23, 2020
- SANDISK TECHNOLOGIES LLC
- Murshed CHOWDHURY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCATION DEPENDENT IMPEDANCE MITIGATION IN NON-VOLATILE MEMORY
- Publication number 20200143893
- Publication date May 7, 2020
- SANDISK TECHNOLOGIES LLC
- Peter Rabkin
- G11 - INFORMATION STORAGE
Information Patent Application
IMPEDANCE MISMATCH MITIGATION SCHEME
- Publication number 20200143889
- Publication date May 7, 2020
- SANDISK TECHNOLOGIES LLC
- Peter Rabkin
- G11 - INFORMATION STORAGE
Information Patent Application
ERASE OPERATION IN 3D NAND
- Publication number 20200143888
- Publication date May 7, 2020
- SANDISK TECHNOLOGIES LLC
- Peter Rabkin
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE HAVING SUPPORT-DIE-ASSISTED SOURCE...
- Publication number 20200066703
- Publication date Feb 27, 2020
- SANDISK TECHNOLOGIES LLC
- Kwang-Ho KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE HAVING SUPPORT-DIE-ASSISTED SOURCE...
- Publication number 20190221557
- Publication date Jul 18, 2019
- SANDISK TECHNOLOGIES LLC
- Kwang-Ho KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Verify Operations Using Different Sense Node Voltages In A Memory D...
- Publication number 20170076812
- Publication date Mar 16, 2017
- SANDISK TECHNOLOGIES INC.
- Alexander Chu
- G11 - INFORMATION STORAGE
Information Patent Application
FAST SCAN TO DETECT BIT LINE DISCHARGE TIME
- Publication number 20160372200
- Publication date Dec 22, 2016
- SANDISK TECHNOLOGIES INC.
- Yen-Lung Li
- G11 - INFORMATION STORAGE
Information Patent Application
Sense Amplifier With Efficient Use Of Data Latches
- Publication number 20150221348
- Publication date Aug 6, 2015
- SANDISK TECHNOLOGIES INC.
- Tai-Yuan Tseng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
State-Dependent Lockout In Non-Volatile Memory
- Publication number 20150221391
- Publication date Aug 6, 2015
- SANDISK TECHNOLOGIES INC.
- Tai-Yuan Tseng
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED BIT LINE STRING ARCHITECTURE
- Publication number 20140269100
- Publication date Sep 18, 2014
- SANDISK TECHNOLOGIES INC.
- Jongsun Sel
- G11 - INFORMATION STORAGE
Information Patent Application
BIT LINE RESISTANCE COMPENSATION
- Publication number 20140226405
- Publication date Aug 14, 2014
- SanDisk Technologies, Inc.
- Teruhiko Kamei
- G11 - INFORMATION STORAGE
Information Patent Application
Bad Column Management with Bit Information in Non-Volatile Memory S...
- Publication number 20140219023
- Publication date Aug 7, 2014
- SANDISK TECHNOLOGIES INC.
- Yan Li
- G11 - INFORMATION STORAGE
Information Patent Application
BIT LINE RESISTANCE COMPENSATION
- Publication number 20140133231
- Publication date May 15, 2014
- SanDisk Technologies, Inc.
- Kwang Ho Kim
- G11 - INFORMATION STORAGE
Information Patent Application
BIT LINE RESISTANCE COMPENSATION
- Publication number 20140133229
- Publication date May 15, 2014
- SanDisk Technologies, Inc.
- Teruhiko Kamei
- G11 - INFORMATION STORAGE
Information Patent Application
BIT LINE RESISTANCE COMPENSATION
- Publication number 20140133230
- Publication date May 15, 2014
- SanDisk Technologies, Inc.
- Teruhiko Kamei
- G11 - INFORMATION STORAGE
Information Patent Application
BIT LINE BL ISOLATION SCHEME DURING ERASE OPERATION FOR NON-VOLATIL...
- Publication number 20130301358
- Publication date Nov 14, 2013
- SanDisk Technologies, Inc.
- Mohan Vamsi Dunga
- G11 - INFORMATION STORAGE

Kwang-Ho Kim

Person

Patents Grantslast 30 patents

Three-dimensional memory device having support-die-assisted source...

Three-dimensional memory device with vertical field effect transist...

Bonded assembly of semiconductor dies containing pad level across-d...

Three-dimensional memory device with vertical field effect transist...

Three-dimensional memory device with logic signal routing through a...

Three-dimensional memory device having support-die-assisted source...

Temperature dependent impedance mitigation in non-volatile memory

Connectivity detection for wafer-to-wafer alignment and bonding

Three-dimensional memory device including contact-level bit-line-co...

Erase operation in 3D NAND

Location dependent impedance mitigation in non-volatile memory

Three-dimensional memory device including signal and power connecti...

Three-dimensional memory device including signal and power connecti...

Impedance mismatch mitigation scheme that applies asymmetric voltag...

Three-dimensional memory device containing bond pad-based power sup...

Three-dimensional memory device with logic signal routing through a...

Erase operation in 3D NAND flash memory including pathway impedance...

Three-dimensional memory device having support-die-assisted source...

Fast scan to detect bit line discharge time

Bad column management with bit information in non-volatile memory s...

Memory device which performs verify operations using different sens...

Sense amplifier with efficient use of data latches

State-dependent lockout in non-volatile memory

Bit line resistance compensation

Bit line resistance compensation

Bit line BL isolation scheme during erase operation for non-volatil...

Bit line resistance compensation

Shared bit line string architecture

Bit line resistance compensation

Bad column management with bit information in non-volatile memory s...

Patents Applicationslast 30 patents

SEEDING BIAS CONTROL FOR SUB-BLOCK GROUPS IN A MEMORY DEVICE

MANAGING SENSE AMPLIFIER LATCH AND DATA LATCH VOLTAGE TO REDUCE STA...

THREE-DIMENSIONAL MEMORY DEVICE WITH VERTICAL FIELD EFFECT TRANSIST...

THREE-DIMENSIONAL MEMORY DEVICE WITH VERTICAL FIELD EFFECT TRANSIST...

THREE-DIMENSIONAL MEMORY DEVICE HAVING SUPPORT-DIE-ASSISTED SOURCE...

BONDED ASSEMBLY OF SEMICONDUCTOR DIES CONTAINING PAD LEVEL ACROSS-D...

THREE-DIMENSIONAL MEMORY DEVICE INCLUDING CONTACT-LEVEL BIT-LINE-CO...

TEMPERATURE DEPENDENT IMPEDANCE MITIGATION IN NON-VOLATILE MEMORY

CONNECTIVITY DETECTION FOR WAFER-TO-WAFER ALIGNMENT AND BONDING

THREE-DIMENSIONAL MEMORY DEVICE INCLUDING SIGNAL AND POWER CONNECTI...

THREE-DIMENSIONAL MEMORY DEVICE INCLUDING SIGNAL AND POWER CONNECTI...

THREE-DIMENSIONAL MEMORY DEVICE WITH LOGIC SIGNAL ROUTING THROUGH A...

THREE-DIMENSIONAL MEMORY DEVICE WITH LOGIC SIGNAL ROUTING THROUGH A...

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING BOND PAD-BASED POWER SUP...

LOCATION DEPENDENT IMPEDANCE MITIGATION IN NON-VOLATILE MEMORY

IMPEDANCE MISMATCH MITIGATION SCHEME

ERASE OPERATION IN 3D NAND

THREE-DIMENSIONAL MEMORY DEVICE HAVING SUPPORT-DIE-ASSISTED SOURCE...

THREE-DIMENSIONAL MEMORY DEVICE HAVING SUPPORT-DIE-ASSISTED SOURCE...

Verify Operations Using Different Sense Node Voltages In A Memory D...

FAST SCAN TO DETECT BIT LINE DISCHARGE TIME

Sense Amplifier With Efficient Use Of Data Latches

State-Dependent Lockout In Non-Volatile Memory

SHARED BIT LINE STRING ARCHITECTURE

BIT LINE RESISTANCE COMPENSATION

Bad Column Management with Bit Information in Non-Volatile Memory S...

BIT LINE RESISTANCE COMPENSATION

BIT LINE RESISTANCE COMPENSATION

BIT LINE RESISTANCE COMPENSATION

BIT LINE BL ISOLATION SCHEME DURING ERASE OPERATION FOR NON-VOLATIL...