Kyle Juretus

Person

Quakertown, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reducing logic locking key leakage through the scan chain
- Patent number 11,971,987
- Issue date Apr 30, 2024
- Drexel University
- Kyle Joseph Juretus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical layer key based interleaving for secure wireless communica...
- Patent number 11,540,120
- Issue date Dec 27, 2022
- Drexel University
- Kapil R. Dandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced overhead gate level logic encryption
- Patent number 11,282,414
- Issue date Mar 22, 2022
- Drexel University
- Ioannis Savidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Securing analog mixed-signal integrated circuits through shared dep...
- Patent number 11,270,031
- Issue date Mar 8, 2022
- Drexel University
- Ioannis Savidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical gate based preamble obfuscation for securing wireless comm...
- Patent number 11,177,902
- Issue date Nov 16, 2021
- Drexel University
- James J. Chacko
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Protecting analog circuits with parameter biasing obfuscation
- Patent number 10,923,442
- Issue date Feb 16, 2021
- Drexel University
- Ioannis Savidis
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Physical Layer Key based Interleaving for Secure Wireless Communica...
- Publication number 20240214803
- Publication date Jun 27, 2024
- Drexel University
- Kapil R. Dandekar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
REDUCING LOGIC LOCKING KEY LEAKAGE THROUGH THE SCAN CHAIN
- Publication number 20230090772
- Publication date Mar 23, 2023
- Drexel University
- Kyle Joseph Juretus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced circuity security through hidden state transitions
- Publication number 20210019449
- Publication date Jan 21, 2021
- Drexel University
- Kyle Joseph Juretus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURING ANALOG MIXED-SIGNAL INTEGRATED CIRCUITS THROUGH SHARED DEP...
- Publication number 20200342142
- Publication date Oct 29, 2020
- Drexel University
- Ioannis Savidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Physical Gate based Preamble Obfuscation for Securing Wireless Comm...
- Publication number 20190373463
- Publication date Dec 5, 2019
- Drexel University
- James J. Chacko
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Physical Layer Key based Interleaving for Secure Wireless Communica...
- Publication number 20190373458
- Publication date Dec 5, 2019
- Drexel University
- Kapil R. Dandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reduced Overhead Gate Level Logic Encryption
- Publication number 20180315351
- Publication date Nov 1, 2018
- Drexel University
- Ioannis Savidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Protecting Analog Circuits with Parameter Biasing Obfuscation
- Publication number 20180301426
- Publication date Oct 18, 2018
- Drexel University
- Ioannis Savidis
- H03 - BASIC ELECTRONIC CIRCUITRY

Kyle Juretus

Person

Patents Grantslast 30 patents

Reducing logic locking key leakage through the scan chain

Physical layer key based interleaving for secure wireless communica...

Reduced overhead gate level logic encryption

Securing analog mixed-signal integrated circuits through shared dep...

Physical gate based preamble obfuscation for securing wireless comm...

Protecting analog circuits with parameter biasing obfuscation

Patents Applicationslast 30 patents

Physical Layer Key based Interleaving for Secure Wireless Communica...

REDUCING LOGIC LOCKING KEY LEAKAGE THROUGH THE SCAN CHAIN

Enhanced circuity security through hidden state transitions

SECURING ANALOG MIXED-SIGNAL INTEGRATED CIRCUITS THROUGH SHARED DEP...

Physical Gate based Preamble Obfuscation for Securing Wireless Comm...

Physical Layer Key based Interleaving for Secure Wireless Communica...

Reduced Overhead Gate Level Logic Encryption

Protecting Analog Circuits with Parameter Biasing Obfuscation