L. James Hwang

Person

Portola Valley, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hardware-software design flow with high-level synthesis for heterog...
- Patent number 11,645,053
- Issue date May 9, 2023
- Xilinx, Inc.
- Akella Sastry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-software design flow with high-level synthesis for heterog...
- Patent number 11,188,312
- Issue date Nov 30, 2021
- Xilinx, Inc.
- Akella Sastry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Development environment for heterogeneous devices
- Patent number 10,977,018
- Issue date Apr 13, 2021
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware and software event tracing for a system-on-chip
- Patent number 10,635,769
- Issue date Apr 28, 2020
- Xilinx, Inc.
- Samuel A. Skalicky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encapsulating metadata of a platform for application-specific tailo...
- Patent number 9,880,966
- Issue date Jan 30, 2018
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compilation of system designs
- Patent number 9,805,152
- Issue date Oct 31, 2017
- Xilinx, Inc.
- Jorge E. Carrillo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic implementation of a customized system-on-chip
- Patent number 9,652,570
- Issue date May 16, 2017
- Xilinx, Inc.
- Vinod K. Kathail
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compilation of HLL code with hardware accelerated functions
- Patent number 9,223,921
- Issue date Dec 29, 2015
- Xilinx, Inc.
- Jorge E. Carrillo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware and software cosynthesis performance estimation
- Patent number 9,147,024
- Issue date Sep 29, 2015
- Xilinx, Inc.
- Vinod K. Kathail
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verification and debugging using heterogeneous simulation models
- Patent number 8,868,396
- Issue date Oct 21, 2014
- Xilinx, Inc.
- Nabeel Shirazi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software debugging of synthesized hardware
- Patent number 8,775,986
- Issue date Jul 8, 2014
- Xilinx, Inc.
- Sundararajarao Mohan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic generation of a data transfer network
- Patent number 8,762,916
- Issue date Jun 24, 2014
- Xilinx, Inc.
- Vinod K. Kathail
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interfacing with a dynamically configurable arithmetic unit
- Patent number 8,024,678
- Issue date Sep 20, 2011
- Xilinx, Inc.
- Bradley L. Taylor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of simulating bidirectional signals in a modeling system
- Patent number 7,934,185
- Issue date Apr 26, 2011
- Xilinx, Inc.
- Jonathan B. Ballagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation of a program in a dynamically-typed language to a progr...
- Patent number 7,895,584
- Issue date Feb 22, 2011
- Xilinx, Inc.
- Haibing Ma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast hardware co-simulation reset using partial bitstreams
- Patent number 7,739,092
- Issue date Jun 15, 2010
- Xilinx, Inc.
- Jonathan B. Ballagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generation of a high-level simulation model of an electronic system...
- Patent number 7,684,968
- Issue date Mar 23, 2010
- Xilinx, Inc.
- Gabor Szedo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interfacing with a dynamically configurable arithmetic unit
- Patent number 7,523,434
- Issue date Apr 21, 2009
- Xilinx, Inc.
- Bradley L. Taylor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for integrating cores in FPGA-based system-on-chi...
- Patent number 7,509,614
- Issue date Mar 24, 2009
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock stabilization detection for hardware simulation
- Patent number 7,478,030
- Issue date Jan 13, 2009
- Xilinx, Inc.
- Jonathan B. Ballagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-based co-simulation on a PLD having an embedded processor
- Patent number 7,437,280
- Issue date Oct 14, 2008
- Xilinx, Inc.
- Jonathan B. Ballagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Embedding a co-simulated hardware object in an event-driven simulator
- Patent number 7,433,813
- Issue date Oct 7, 2008
- Xilinx, Inc.
- Jonathan B. Ballagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wireless dynamic boundary-scan topologies for field
- Patent number 7,383,478
- Issue date Jun 3, 2008
- Xilinx, Inc.
- Jonathan B. Ballagh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method of simulating bidirectional signals in a modeling system
- Patent number 7,363,600
- Issue date Apr 22, 2008
- Xilinx, Inc.
- Jonathan B. Ballagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Embedding a hardware object in an application system
- Patent number 7,284,225
- Issue date Oct 16, 2007
- Xilinx, Inc.
- Jonathan B. Ballagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for integrating cores in FPGA-based system-on-chi...
- Patent number 7,216,328
- Issue date May 8, 2007
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
HDL co-simulation in a high-level modeling system
- Patent number 7,203,632
- Issue date Apr 10, 2007
- Xilinx, Inc.
- Roger B. Milne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simulation of integrated circuitry within a high-level modeling sys...
- Patent number 7,194,705
- Issue date Mar 20, 2007
- Xilinx, Inc.
- Kumar Deepak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for modeling and automatically generating an elec...
- Patent number 7,110,935
- Issue date Sep 19, 2006
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for modeling and automatically generating an embe...
- Patent number 7,085,702
- Issue date Aug 1, 2006
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
HARDWARE-SOFTWARE DESIGN FLOW WITH HIGH-LEVEL SYNTHESIS FOR HETEROG...
- Publication number 20220035607
- Publication date Feb 3, 2022
- Xilinx, Inc.
- Akella Sastry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE-SOFTWARE DESIGN FLOW WITH HIGH-LEVEL SYNTHESIS FOR HETEROG...
- Publication number 20200371759
- Publication date Nov 26, 2020
- Xilinx, Inc.
- Akella Sastry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for integrating cores in FPGA-based system-on-chi...
- Publication number 20050183045
- Publication date Aug 18, 2005
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for integrating cores in FPGA-based system-on-chi...
- Publication number 20050177656
- Publication date Aug 11, 2005
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HDL Co-simulation in a high-level modeling system
- Publication number 20040181385
- Publication date Sep 16, 2004
- Xilinx, Inc.
- Roger B. Milne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for integrating cores in FPGA-based system-on-chi...
- Publication number 20030163798
- Publication date Aug 28, 2003
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and media for utilizing symbolic expressions in circuit mod...
- Publication number 20010001881
- Publication date May 24, 2001
- Sundararajarao Mohan
- G06 - COMPUTING CALCULATING COUNTING

L. James Hwang

Person

Patents Grantslast 30 patents

Hardware-software design flow with high-level synthesis for heterog...

Hardware-software design flow with high-level synthesis for heterog...

Development environment for heterogeneous devices

Hardware and software event tracing for a system-on-chip

Encapsulating metadata of a platform for application-specific tailo...

Compilation of system designs

Automatic implementation of a customized system-on-chip

Compilation of HLL code with hardware accelerated functions

Hardware and software cosynthesis performance estimation

Verification and debugging using heterogeneous simulation models

Software debugging of synthesized hardware

Automatic generation of a data transfer network

Interfacing with a dynamically configurable arithmetic unit

Method of simulating bidirectional signals in a modeling system

Translation of a program in a dynamically-typed language to a progr...

Fast hardware co-simulation reset using partial bitstreams

Generation of a high-level simulation model of an electronic system...

Interfacing with a dynamically configurable arithmetic unit

Method and system for integrating cores in FPGA-based system-on-chi...

Clock stabilization detection for hardware simulation

Hardware-based co-simulation on a PLD having an embedded processor

Embedding a co-simulated hardware object in an event-driven simulator

Wireless dynamic boundary-scan topologies for field

Method of simulating bidirectional signals in a modeling system

Embedding a hardware object in an application system

Method and system for integrating cores in FPGA-based system-on-chi...

HDL co-simulation in a high-level modeling system

Simulation of integrated circuitry within a high-level modeling sys...

Method and system for modeling and automatically generating an elec...

Method and system for modeling and automatically generating an embe...

Patents Applicationslast 30 patents

HARDWARE-SOFTWARE DESIGN FLOW WITH HIGH-LEVEL SYNTHESIS FOR HETEROG...

HARDWARE-SOFTWARE DESIGN FLOW WITH HIGH-LEVEL SYNTHESIS FOR HETEROG...

Method and system for integrating cores in FPGA-based system-on-chi...

Method and system for integrating cores in FPGA-based system-on-chi...

HDL Co-simulation in a high-level modeling system

Method and system for integrating cores in FPGA-based system-on-chi...

Methods and media for utilizing symbolic expressions in circuit mod...