Lai Guan Tang

Person

Penang, MY

People

Patents Grantslast 30 patents

Information Patent Grant
Techniques for clock signal transmission in integrated circuits and...
- Patent number 12,026,008
- Issue date Jul 2, 2024
- Altera Corporation
- Jeffrey Chromczak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fabric die to fabric die interconnect for modularized integrated ci...
- Patent number 12,009,298
- Issue date Jun 11, 2024
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Network-on-chip for inter-die and intra-die communication in modula...
- Patent number 11,726,932
- Issue date Aug 15, 2023
- Intel Corporation
- George Chong Hean Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 11,714,941
- Issue date Aug 1, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequency translation circuitry for an interconnection in an active...
- Patent number 11,669,472
- Issue date Jun 6, 2023
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fabric die to fabric die interconnect for modularized integrated ci...
- Patent number 11,670,589
- Issue date Jun 6, 2023
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-speed core interconnect for multi-die programmable logic devices
- Patent number 11,621,713
- Issue date Apr 4, 2023
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus to synchronize clocks of configurable integrated circuit...
- Patent number 11,528,029
- Issue date Dec 13, 2022
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for clock signal transmission in integrated circuits and...
- Patent number 11,500,412
- Issue date Nov 15, 2022
- Intel Corporation
- Jeffrey Chromczak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable micro bumps indexing and redundancy scheme for homogeneous...
- Patent number 11,336,286
- Issue date May 17, 2022
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation circuitry for an interconnection in an active interpose...
- Patent number 11,216,397
- Issue date Jan 4, 2022
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-speed core interconnect for multi-die programmable logic devices
- Patent number 11,128,301
- Issue date Sep 21, 2021
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 11,080,449
- Issue date Aug 3, 2021
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Die to die interconnect structure for modularized integrated circui...
- Patent number 11,062,070
- Issue date Jul 13, 2021
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network-on-chip for inter-die and intra-die communication in modula...
- Patent number 11,036,660
- Issue date Jun 15, 2021
- Intel Corporation
- George Chong Hean Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fabric die to fabric die interconnect for modularized integrated ci...
- Patent number 10,886,218
- Issue date Jan 5, 2021
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-speed core interconnect for multi-die programmable logic devices
- Patent number 10,666,261
- Issue date May 26, 2020
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 10,642,946
- Issue date May 5, 2020
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pulse-width modulation voltage identification interface
- Patent number 10,382,013
- Issue date Aug 13, 2019
- Altera Corporation
- Lai Guan Tang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for power control of circuit blocks
- Patent number 10,211,833
- Issue date Feb 19, 2019
- Altera Corporation
- Lai Guan Tang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for generating pulse-width modulation data
- Patent number 10,177,753
- Issue date Jan 8, 2019
- Altera Corporation
- Lai Guan Tang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Graphics render clock throttling and gating mechanism for power saving
- Patent number 8,780,121
- Issue date Jul 15, 2014
- Intel Corporation
- Lai Kuan Chong
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...
- Publication number 20240312909
- Publication date Sep 19, 2024
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...
- Publication number 20230378061
- Publication date Nov 23, 2023
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit Systems And Methods For Transmitting Signals Between Devices
- Publication number 20230342309
- Publication date Oct 26, 2023
- Intel Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20230306173
- Publication date Sep 28, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Clock Signal Transmission In Integrated Circuits And...
- Publication number 20230049681
- Publication date Feb 16, 2023
- Intel Corporation
- Jeffrey Chromczak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Die-to-Die Interconnect Architecture for Hardware-Agnostic Modeling
- Publication number 20230042718
- Publication date Feb 9, 2023
- Ankireddy Nalamalpu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKAGE IO ESCAPE ROUTING ON A DISAGGREGATED SHORELINE
- Publication number 20230028475
- Publication date Jan 26, 2023
- Ankireddy Nalamalpu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Die-to-Die Power Delivery
- Publication number 20230024662
- Publication date Jan 26, 2023
- Ankireddy Nalamalpu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GRID-BASED INTERCONNECT SYSTEM FOR MODULAR INTEGRATED CIRCUIT SYSTEMS
- Publication number 20220336415
- Publication date Oct 20, 2022
- Lai Guan Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three-Dimensional Columnar Input-Output (IO) Circuitry for Integrat...
- Publication number 20220337250
- Publication date Oct 20, 2022
- Mahesh K. Kumashikar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE ROUTING BRIDGE
- Publication number 20220337248
- Publication date Oct 20, 2022
- Intel Corporation
- J-Wing Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR MODULAR DISAGGREGATED INTEGRATED CIRCUIT SY...
- Publication number 20220337251
- Publication date Oct 20, 2022
- Ankireddy Nalamalpu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR DYNAMIC POWER AND THERMAL MANAGEMENT FOR PR...
- Publication number 20220294455
- Publication date Sep 15, 2022
- Intel Corporation
- Mahesh K. Kumashikar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURITY ON DIE-TO-DIE INTERCONNECT
- Publication number 20220229941
- Publication date Jul 21, 2022
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCKING ARCHITECTURE FOR A MULTI-DIE PACKAGE
- Publication number 20220224342
- Publication date Jul 14, 2022
- Atul Maheshwari
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20220198115
- Publication date Jun 23, 2022
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems And Methods For Configurable Interface Circuits
- Publication number 20220109446
- Publication date Apr 7, 2022
- Intel Corporation
- Paul Rotker
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SELECTIVE USE OF DIFFERENT ADVANCED INTERFACE BUS WITH ELECTRONIC C...
- Publication number 20220102281
- Publication date Mar 31, 2022
- Dheeraj Subbareddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSLATION CIRCUITRY FOR AN INTERCONNECTION IN A SEMICONDUCTOR PAC...
- Publication number 20220092009
- Publication date Mar 24, 2022
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH-SPEED CORE INTERCONNECT FOR MULTI-DIE PROGRAMMABLE LOGIC DEVICES
- Publication number 20210384911
- Publication date Dec 9, 2021
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK-ON-CHIP FOR INTER-DIE AND INTRA-DIE COMMUNICATION IN MODULA...
- Publication number 20210303491
- Publication date Sep 30, 2021
- Intel Corporation
- George Chong Hean Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...
- Publication number 20210111116
- Publication date Apr 15, 2021
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH-SPEED CORE INTERCONNECT FOR MULTI-DIE PROGRAMMABLE LOGIC DEVICES
- Publication number 20200321964
- Publication date Oct 8, 2020
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20200226313
- Publication date Jul 16, 2020
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION CIRCUITRY FOR AN INTERCONNECTION IN A SEMICONDUCTOR PAC...
- Publication number 20200133902
- Publication date Apr 30, 2020
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...
- Publication number 20190326210
- Publication date Oct 24, 2019
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques For Clock Signal Transmission In Integrated Circuits And...
- Publication number 20190227590
- Publication date Jul 25, 2019
- Intel Corporation
- Jeffrey Chromczak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK-ON-CHIP FOR INTER-DIE AND INTRA-DIE COMMUNICATION IN MODULA...
- Publication number 20190227963
- Publication date Jul 25, 2019
- Intel Corporation
- George Chong Hean Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIE TO DIE INTERCONNECT STRUCTURE FOR MODULARIZED INTEGRATED CIRCUI...
- Publication number 20190220566
- Publication date Jul 18, 2019
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable Micro Bumps Indexing and Redundancy Scheme for Homogeneous...
- Publication number 20190158096
- Publication date May 23, 2019
- Intel Corporation
- Lai Guan Tang
- H03 - BASIC ELECTRONIC CIRCUITRY

Lai Guan Tang

Person

Patents Grantslast 30 patents

Techniques for clock signal transmission in integrated circuits and...

Fabric die to fabric die interconnect for modularized integrated ci...

Network-on-chip for inter-die and intra-die communication in modula...

Modular periphery tile for integrated circuit device

Frequency translation circuitry for an interconnection in an active...

Fabric die to fabric die interconnect for modularized integrated ci...

High-speed core interconnect for multi-die programmable logic devices

Apparatus to synchronize clocks of configurable integrated circuit...

Techniques for clock signal transmission in integrated circuits and...

Scalable micro bumps indexing and redundancy scheme for homogeneous...

Translation circuitry for an interconnection in an active interpose...

High-speed core interconnect for multi-die programmable logic devices

Modular periphery tile for integrated circuit device

Die to die interconnect structure for modularized integrated circui...

Network-on-chip for inter-die and intra-die communication in modula...

Fabric die to fabric die interconnect for modularized integrated ci...

High-speed core interconnect for multi-die programmable logic devices

Modular periphery tile for integrated circuit device

Pulse-width modulation voltage identification interface

Techniques for power control of circuit blocks

Techniques for generating pulse-width modulation data

Graphics render clock throttling and gating mechanism for power saving

Patents Applicationslast 30 patents

Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...

Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...

Circuit Systems And Methods For Transmitting Signals Between Devices

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

Techniques For Clock Signal Transmission In Integrated Circuits And...

Die-to-Die Interconnect Architecture for Hardware-Agnostic Modeling

PACKAGE IO ESCAPE ROUTING ON A DISAGGREGATED SHORELINE

Die-to-Die Power Delivery

GRID-BASED INTERCONNECT SYSTEM FOR MODULAR INTEGRATED CIRCUIT SYSTEMS

Three-Dimensional Columnar Input-Output (IO) Circuitry for Integrat...

PROGRAMMABLE ROUTING BRIDGE

SYSTEMS AND METHODS FOR MODULAR DISAGGREGATED INTEGRATED CIRCUIT SY...

SYSTEMS AND METHODS FOR DYNAMIC POWER AND THERMAL MANAGEMENT FOR PR...

SECURITY ON DIE-TO-DIE INTERCONNECT

CLOCKING ARCHITECTURE FOR A MULTI-DIE PACKAGE

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

Systems And Methods For Configurable Interface Circuits

SELECTIVE USE OF DIFFERENT ADVANCED INTERFACE BUS WITH ELECTRONIC C...

TRANSLATION CIRCUITRY FOR AN INTERCONNECTION IN A SEMICONDUCTOR PAC...

HIGH-SPEED CORE INTERCONNECT FOR MULTI-DIE PROGRAMMABLE LOGIC DEVICES

NETWORK-ON-CHIP FOR INTER-DIE AND INTRA-DIE COMMUNICATION IN MODULA...

Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...

HIGH-SPEED CORE INTERCONNECT FOR MULTI-DIE PROGRAMMABLE LOGIC DEVICES

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

TRANSLATION CIRCUITRY FOR AN INTERCONNECTION IN A SEMICONDUCTOR PAC...

Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...

Techniques For Clock Signal Transmission In Integrated Circuits And...

NETWORK-ON-CHIP FOR INTER-DIE AND INTRA-DIE COMMUNICATION IN MODULA...

DIE TO DIE INTERCONNECT STRUCTURE FOR MODULARIZED INTEGRATED CIRCUI...

Scalable Micro Bumps Indexing and Redundancy Scheme for Homogeneous...