Lakshminarayana Pappu

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus to reduce display connection latency
- Patent number 12,117,878
- Issue date Oct 15, 2024
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for functional testing of one or more...
- Patent number 11,686,767
- Issue date Jun 27, 2023
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for providing a fabric for an accelerator
- Patent number 11,231,927
- Issue date Jan 25, 2022
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for inter-die functional testing of an...
- Patent number 11,105,854
- Issue date Aug 31, 2021
- Intel Corporation
- Lakshminarayana Pappu
- G01 - MEASURING TESTING
Information Patent Grant
Dynamically programmable memory test traffic router
- Patent number 11,042,315
- Issue date Jun 22, 2021
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques in ensuring functional safety (fusa) systems
- Patent number 10,901,035
- Issue date Jan 26, 2021
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for handshaking protocol for low power...
- Patent number 10,739,836
- Issue date Aug 11, 2020
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundancy in distribution of voltage-frequency scaling parameters
- Patent number 10,732,699
- Issue date Aug 4, 2020
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Platform component interconnect testing
- Patent number 10,725,097
- Issue date Jul 28, 2020
- Intel Corporation
- Lakshminarayana Pappu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Device, system and method for providing on-chip test/debug function...
- Patent number 10,705,142
- Issue date Jul 7, 2020
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Touch host controller
- Patent number 10,691,249
- Issue date Jun 23, 2020
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Innovative high speed serial controller testing
- Patent number 10,664,433
- Issue date May 26, 2020
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Innovative high speed serial controller testing
- Patent number 10,657,092
- Issue date May 19, 2020
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Platform debug and testing with secured hardware
- Patent number 10,613,955
- Issue date Apr 7, 2020
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for implementing a virtual device...
- Patent number 10,484,361
- Issue date Nov 19, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Firmware fingerprinting based on data monitored during firmware loa...
- Patent number 10,430,314
- Issue date Oct 1, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device, system and method for packet processing to facilitate circu...
- Patent number 10,417,170
- Issue date Sep 17, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Display controller testing through high speed communications switch
- Patent number 10,410,560
- Issue date Sep 10, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Maintaining IO block operation in electronic systems for board testing
- Patent number 10,379,980
- Issue date Aug 13, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protocol aware testing engine for high speed link integrity testing
- Patent number 10,346,265
- Issue date Jul 9, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Board level leakage testing for memory interface
- Patent number 10,319,453
- Issue date Jun 11, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase lock loop bypass for board-level testing of systems
- Patent number 10,303,237
- Issue date May 28, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for implementing die recovery in...
- Patent number 10,249,597
- Issue date Apr 2, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G11 - INFORMATION STORAGE
Information Patent Grant
Mechanism to provide back-to-back testing of memory controller oper...
- Patent number 10,204,025
- Issue date Feb 12, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G11 - INFORMATION STORAGE
Information Patent Grant
Low cost inbuilt deterministic tester for SOC testing
- Patent number 10,192,633
- Issue date Jan 29, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device, system and method for on-chip testing of protocol stack cir...
- Patent number 10,185,695
- Issue date Jan 22, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient low cost on-die configurable bridge controller
- Patent number 10,127,162
- Issue date Nov 13, 2018
- Intel Corporation
- Suketu U. Bhatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for implementing testing of a far...
- Patent number 10,056,155
- Issue date Aug 21, 2018
- Intel Corporation
- Lakshminarayana Pappu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for a scalable test engine
- Patent number 10,042,729
- Issue date Aug 7, 2018
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stacked semiconductor package and method for performing bare die te...
- Patent number 9,995,785
- Issue date Jun 12, 2018
- Intel Corporation
- Lakshminarayana Pappu
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
DYNAMIC VOLTAGE AND FREQUENCY SCALING FOR DISCRETE GRAPHICS SYSTEMS
- Publication number 20230113953
- Publication date Apr 13, 2023
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC HANDLING FOR DISAGGREGATED 3D STRUCTURED SOCS
- Publication number 20230114164
- Publication date Apr 13, 2023
- Intel Corporation
- Rahul Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INFRASTRUCTURE FOR PLATFORM IMMERSIVE EXPERIENCE
- Publication number 20230115292
- Publication date Apr 13, 2023
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System-on-a-Chip (SoC) Architecture for Low Power State Communication
- Publication number 20230114271
- Publication date Apr 13, 2023
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR GPU ARCHITECTURE FOR CLIENTS AND SERVERS
- Publication number 20230109990
- Publication date Apr 13, 2023
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE DISPLAY CONNECTION LATENCY
- Publication number 20220291733
- Publication date Sep 15, 2022
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER MANAGEMENT TECHNIQUES
- Publication number 20220138101
- Publication date May 5, 2022
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOC ARCHITECTURE TO REDUCE MEMORY BANDWIDTH BOTTLENECKS AND FACILIT...
- Publication number 20220121594
- Publication date Apr 21, 2022
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATOR FABRIC FOR DISCRETE GRAPHICS
- Publication number 20220113967
- Publication date Apr 14, 2022
- Intel Corporation
- Abhishek Reddy Pamu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD, APPARATUS AND ARCHITECTURE FOR DYNAMICALLY CONFIGUR...
- Publication number 20220114131
- Publication date Apr 14, 2022
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECT NETWORK FOR MULTI-TILE SYSTEM ON CHIPS
- Publication number 20220116322
- Publication date Apr 14, 2022
- Intel Corporation
- Abhishek Reddy Pamu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY COMMUNICATION PATH FOR AUDIO/VISUAL (A/V) APPLICATIONS
- Publication number 20220070522
- Publication date Mar 3, 2022
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES IN ENSURING FUNCTIONAL SAFETY (FUSA) SYSTEMS
- Publication number 20200249276
- Publication date Aug 6, 2020
- Intel Corporation
- Lakshminarayana Pappu
- G01 - MEASURING TESTING
Information Patent Application
REDUNDANCY IN DISTRIBUTION OF VOLTAGE-FREQUENCY SCALING PARAMETERS
- Publication number 20190265771
- Publication date Aug 29, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TOUCH HOST CONTROLLER
- Publication number 20190102032
- Publication date Apr 4, 2019
- Intel Corporation
- Lakshminarayana PAPPU
- G02 - OPTICS
Information Patent Application
PROGRAMMABLE TESTER FOR MASTER-SLAVE DEVICE NETWORKS
- Publication number 20190052539
- Publication date Feb 14, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMICALLY PROGRAMMABLE MEMORY TEST TRAFFIC ROUTER
- Publication number 20190042131
- Publication date Feb 7, 2019
- Intel Corporation
- Lakshminarayana PAPPU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLATFORM DEBUG AND TESTING WITH SECURED HARDWARE
- Publication number 20190042382
- Publication date Feb 7, 2019
- Intel Corporation
- Lakshminarayana PAPPU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH-BANDWIDTH, LOW-LATENCY, ISOCHORONOUS FABRIC FOR GRAPHICS ACCEL...
- Publication number 20190042487
- Publication date Feb 7, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Handshaking Protocol For Low Power...
- Publication number 20190041959
- Publication date Feb 7, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Providing A Fabric For An Accelerator
- Publication number 20190042240
- Publication date Feb 7, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Functional Testing Of One Or More...
- Publication number 20190033367
- Publication date Jan 31, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Inter-Die Functional Testing Of An...
- Publication number 20190033368
- Publication date Jan 31, 2019
- Intel Corporation
- Lakshminarayana Pappu
- G01 - MEASURING TESTING
Information Patent Application
DEVICE, SYSTEM AND METHOD FOR ON-CHIP TESTING OF PROTOCOL STACK CIR...
- Publication number 20180285305
- Publication date Oct 4, 2018
- Intel Corporation
- Lakshminarayana PAPPU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE, SYSTEM AND METHOD FOR PACKET PROCESSING TO FACILITATE CIRCU...
- Publication number 20180285310
- Publication date Oct 4, 2018
- Intel Corporation
- Lakshminarayana PAPPU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHASE LOCK LOOP BYPASS FOR BOARD-LEVEL TESTING OF SYSTEMS
- Publication number 20180275736
- Publication date Sep 27, 2018
- Intel Corporation
- LAKSHMINARAYANA PAPPU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAINTAINING IO BLOCK OPERATION IN ELECTRONIC SYSTEMS FOR BOARD TESTING
- Publication number 20180276094
- Publication date Sep 27, 2018
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISPLAY CONTROLLER TESTING THROUGH HIGH SPEED COMMUNICATIONS SWITCH
- Publication number 20180268749
- Publication date Sep 20, 2018
- Intel Corporation
- Lakshminarayana PAPPU
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Application
BOARD LEVEL LEAKAGE TESTING FOR MEMORY INTERFACE
- Publication number 20180268915
- Publication date Sep 20, 2018
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM TO PROVIDE BACK-TO-BACK TESTING OF MEMORY CONTROLLER OPER...
- Publication number 20180246796
- Publication date Aug 30, 2018
- Intel Corporation
- Lakshminarayana PAPPU
- G06 - COMPUTING CALCULATING COUNTING

Lakshminarayana Pappu

Person

Patents Grantslast 30 patents

Methods and apparatus to reduce display connection latency

System, apparatus and method for functional testing of one or more...

System, apparatus and method for providing a fabric for an accelerator

System, apparatus and method for inter-die functional testing of an...

Dynamically programmable memory test traffic router

Techniques in ensuring functional safety (fusa) systems

System, apparatus and method for handshaking protocol for low power...

Redundancy in distribution of voltage-frequency scaling parameters

Platform component interconnect testing

Device, system and method for providing on-chip test/debug function...

Touch host controller

Innovative high speed serial controller testing

Innovative high speed serial controller testing

Platform debug and testing with secured hardware

Systems, methods, and apparatuses for implementing a virtual device...

Firmware fingerprinting based on data monitored during firmware loa...

Device, system and method for packet processing to facilitate circu...

Display controller testing through high speed communications switch

Maintaining IO block operation in electronic systems for board testing

Protocol aware testing engine for high speed link integrity testing

Board level leakage testing for memory interface

Phase lock loop bypass for board-level testing of systems

Systems, methods, and apparatuses for implementing die recovery in...

Mechanism to provide back-to-back testing of memory controller oper...

Low cost inbuilt deterministic tester for SOC testing

Device, system and method for on-chip testing of protocol stack cir...

Efficient low cost on-die configurable bridge controller

Systems, methods, and apparatuses for implementing testing of a far...

Apparatus and method for a scalable test engine

Stacked semiconductor package and method for performing bare die te...

Patents Applicationslast 30 patents

DYNAMIC VOLTAGE AND FREQUENCY SCALING FOR DISCRETE GRAPHICS SYSTEMS

ATOMIC HANDLING FOR DISAGGREGATED 3D STRUCTURED SOCS

INFRASTRUCTURE FOR PLATFORM IMMERSIVE EXPERIENCE

System-on-a-Chip (SoC) Architecture for Low Power State Communication

MODULAR GPU ARCHITECTURE FOR CLIENTS AND SERVERS

METHODS AND APPARATUS TO REDUCE DISPLAY CONNECTION LATENCY

MEMORY CONTROLLER MANAGEMENT TECHNIQUES

SOC ARCHITECTURE TO REDUCE MEMORY BANDWIDTH BOTTLENECKS AND FACILIT...

ACCELERATOR FABRIC FOR DISCRETE GRAPHICS

SYSTEM, METHOD, APPARATUS AND ARCHITECTURE FOR DYNAMICALLY CONFIGUR...

INTERCONNECT NETWORK FOR MULTI-TILE SYSTEM ON CHIPS

LOW LATENCY COMMUNICATION PATH FOR AUDIO/VISUAL (A/V) APPLICATIONS

TECHNIQUES IN ENSURING FUNCTIONAL SAFETY (FUSA) SYSTEMS

REDUNDANCY IN DISTRIBUTION OF VOLTAGE-FREQUENCY SCALING PARAMETERS

TOUCH HOST CONTROLLER

PROGRAMMABLE TESTER FOR MASTER-SLAVE DEVICE NETWORKS

DYNAMICALLY PROGRAMMABLE MEMORY TEST TRAFFIC ROUTER

PLATFORM DEBUG AND TESTING WITH SECURED HARDWARE

HIGH-BANDWIDTH, LOW-LATENCY, ISOCHORONOUS FABRIC FOR GRAPHICS ACCEL...

System, Apparatus And Method For Handshaking Protocol For Low Power...

System, Apparatus And Method For Providing A Fabric For An Accelerator

System, Apparatus And Method For Functional Testing Of One Or More...

System, Apparatus And Method For Inter-Die Functional Testing Of An...

DEVICE, SYSTEM AND METHOD FOR ON-CHIP TESTING OF PROTOCOL STACK CIR...

DEVICE, SYSTEM AND METHOD FOR PACKET PROCESSING TO FACILITATE CIRCU...

PHASE LOCK LOOP BYPASS FOR BOARD-LEVEL TESTING OF SYSTEMS

MAINTAINING IO BLOCK OPERATION IN ELECTRONIC SYSTEMS FOR BOARD TESTING

DISPLAY CONTROLLER TESTING THROUGH HIGH SPEED COMMUNICATIONS SWITCH

BOARD LEVEL LEAKAGE TESTING FOR MEMORY INTERFACE

MECHANISM TO PROVIDE BACK-TO-BACK TESTING OF MEMORY CONTROLLER OPER...