Lap Chan

Person

Astor Green, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Method for fabricating semiconductor devices with reduced junction...
- Patent number 8,354,321
- Issue date Jan 15, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Benjamin Colombeau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transformer with effective high turn ratio
- Patent number 8,242,872
- Issue date Aug 14, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Chee Chong Lim
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Tunable high quality factor inductor
- Patent number 8,237,531
- Issue date Aug 7, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Ping Qiu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for fabricating semiconductor devices with reduced junction...
- Patent number 8,053,340
- Issue date Nov 8, 2011
- National University of Singapore
- Benjamin Colombeau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduced metal pipe formation in metal silicide contacts
- Patent number 7,935,632
- Issue date May 3, 2011
- Chartered Semiconductor Manufacturing, Ltd.
- Wei Hua Tong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a gate stack structure
- Patent number 7,932,152
- Issue date Apr 26, 2011
- Chartered Semiconductor Manufacturing, Ltd.
- Will Wong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a shallow junction region using defect engineeri...
- Patent number 7,888,224
- Issue date Feb 15, 2011
- Nanyang Technological University
- Kuang Kian Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory card molding apparatus and process
- Patent number 7,618,249
- Issue date Nov 17, 2009
- ASM Technology Singapore Pte. Ltd.
- Lap Yu Chan
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Grant
Integrated transformer and method of fabrication thereof
- Patent number 7,570,144
- Issue date Aug 4, 2009
- Chartered Semiconductor Manufacturing, Ltd.
- Chee Chong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOSFET device with low gate contact resistance
- Patent number 7,382,027
- Issue date Jun 3, 2008
- Chartered Semiconductor Manufacturing, Ltd.
- Purakh Raj Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for designing semiconductor photomasks
- Patent number 7,313,780
- Issue date Dec 25, 2007
- Chartered Semiconductor Manufacturing Ltd.
- Andrew Khoh
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Process to reduce substrate effects by forming channels under induc...
- Patent number 7,250,669
- Issue date Jul 31, 2007
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned lateral heterojunction bipolar transistor
- Patent number 7,238,971
- Issue date Jul 3, 2007
- Chartered Semiconductor Manufacturing Ltd.
- Jian Xun Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for a heterojunction bipolar transistor using...
- Patent number 7,049,201
- Issue date May 23, 2006
- Chartered Semionductor Manufacturing Ltd.
- Purakh Raj Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for performing nickel salicidation
- Patent number 7,030,451
- Issue date Apr 18, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Pooi See Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heterojunction bipolar transistor using reverse emitter window
- Patent number 7,022,578
- Issue date Apr 4, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Purakh Raj Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lateral heterojunction bipolar transistor and method of manufacture...
- Patent number 6,972,237
- Issue date Dec 6, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Purakh Raj Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process to manufacture nonvolatile MOS memory device
- Patent number 6,962,850
- Issue date Nov 8, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Vincent Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heterojunction bipolar transistor with self-aligned emitter and sid...
- Patent number 6,924,202
- Issue date Aug 2, 2005
- Chartered Semiconductor Manufacturing, Ltd.
- Jian Xun Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned lateral heterojunction bipolar transistor
- Patent number 6,908,824
- Issue date Jun 21, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Jian Xun Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to fill a trench and tunnel by using ALD seed layer and elec...
- Patent number 6,903,013
- Issue date Jun 7, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for performing nickel salicidation
- Patent number 6,890,854
- Issue date May 10, 2005
- Chartered Semiconductor Manufacturing, Inc.
- Pooi See Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heterojunction BiCMOS semiconductor
- Patent number 6,881,976
- Issue date Apr 19, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique to achieve thick silicide film for ultra-shallow junctions
- Patent number 6,878,623
- Issue date Apr 12, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Cheng Cheh Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process to reduce substrate effects by forming channels under induc...
- Patent number 6,869,884
- Issue date Mar 22, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making direct contact on gate by using dielectric stop layer
- Patent number 6,861,317
- Issue date Mar 1, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Purakh Raj Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming an inductor with continuous metal deposition
- Patent number 6,852,605
- Issue date Feb 8, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Chit Hwei Ng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to enhance inductor Q factor by forming air gaps below induc...
- Patent number 6,835,631
- Issue date Dec 28, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Zheng Jia Zhen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low noise inductor using electrically floating high resistive and g...
- Patent number 6,777,774
- Issue date Aug 17, 2004
- Chartered Semiconductor Manufacturing Limited
- Sia Choon Beng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a surface coating layer within an opening within...
- Patent number 6,716,693
- Issue date Apr 6, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH REDUCED JUNCTION...
- Publication number 20120034745
- Publication date Feb 9, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Benjamin COLOMBEAU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A SHALLOW JUNCTION REGION USING DEFECT ENGINEERI...
- Publication number 20100124809
- Publication date May 20, 2010
- Kuang Kian Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A GATE STACK STRUCTURE
- Publication number 20090197387
- Publication date Aug 6, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Will WONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TUNABLE HIGH QUALITY FACTOR INDUCTOR
- Publication number 20090167466
- Publication date Jul 2, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Ping QIU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REDUCED METAL PIPE FORMATION IN METAL SILICIDE CONTACTS
- Publication number 20090114997
- Publication date May 7, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Wei Hua TONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH REDUCED JUNCTION...
- Publication number 20090087971
- Publication date Apr 2, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Benjamin COLOMBEAU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED TRANSFORMER AND METHOD OF FABRICATION THEREOF
- Publication number 20080284552
- Publication date Nov 20, 2008
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Chee Chong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSFORMER WITH EFFECTIVE HIGH TURN RATIO
- Publication number 20080284553
- Publication date Nov 20, 2008
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Chee Chong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CARD MOLDING APPARATUS AND PROCESS
- Publication number 20080075802
- Publication date Mar 27, 2008
- Lap Yu Chan
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Application
System and method for designing semiconductor photomasks
- Publication number 20060206852
- Publication date Sep 14, 2006
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Andrew Khoh
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Self-aligned lateral heterojunction bipolar transistor
- Publication number 20050196931
- Publication date Sep 8, 2005
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Jian Xun Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for performing nickel salicidation
- Publication number 20050156269
- Publication date Jul 21, 2005
- Pooi See Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Heterojunction BiCMOS integrated circuits and method therefor
- Publication number 20050145953
- Publication date Jul 7, 2005
- Chartered Semiconductor Manufacturing LTD.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of making direct contact on gate by using dielectric stop layer
- Publication number 20050136573
- Publication date Jun 23, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Purakh Rajverma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming an inductor with continuous metal deposition
- Publication number 20050124131
- Publication date Jun 9, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Chit Hweing
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Lateral heterojunction bipolar transistor and method of manufacture...
- Publication number 20050116254
- Publication date Jun 2, 2005
- Chartered Semiconductor Manufacturing LTD.
- Purakh Raj Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED LATERAL HETEROJUNCTION BIPOLAR TRANSISTOR
- Publication number 20050101096
- Publication date May 12, 2005
- Chartered Semiconductor Manufacturing LTD.
- Jian Xun Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HETEROJUNCTION BICMOS SEMICONDUCTOR
- Publication number 20050098834
- Publication date May 12, 2005
- Chartered Semiconductor Manufacturing LTD.
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for a heterojunction bipolar transistor using...
- Publication number 20050101038
- Publication date May 12, 2005
- Chartered Semiconductor Manufacturing LTD.
- Purakh Raj Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Heterojunction bipolar transistor with self-aligned emitter and sid...
- Publication number 20050079658
- Publication date Apr 14, 2005
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Jian Xun Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Heterojunction bipolar transistor using reverse emitter window
- Publication number 20050079678
- Publication date Apr 14, 2005
- Chartered Semiconductor Manufacturing LTD.
- Purakh Raj Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process to manufacture nonvolatile MOS memory device
- Publication number 20050074939
- Publication date Apr 7, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Vincent Ho
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD OF MAKING DIRECT CONTACT ON GATE BY USING DIELECTRIC STOP LAYER
- Publication number 20050059216
- Publication date Mar 17, 2005
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Purakh Raj Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process to reduce substrate effects by forming channels under induc...
- Publication number 20050009357
- Publication date Jan 13, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to fill a trench and tunnel by using ALD seed layer and elec...
- Publication number 20040229457
- Publication date Nov 18, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming an inductor with continuous metal deposition
- Publication number 20040217440
- Publication date Nov 4, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Chit Hwei Ng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process to reduce substrate effects by forming channels under induc...
- Publication number 20040038542
- Publication date Feb 26, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Novel technique to achieve thick silicide film for ultra-shallow ju...
- Publication number 20030207565
- Publication date Nov 6, 2003
- Cheng Cheh Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Application of single exposure alternating aperture phase shift mas...
- Publication number 20030203580
- Publication date Oct 30, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Lay Cheng Choo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low noise inductor using electrically floating high resistive and g...
- Publication number 20030197243
- Publication date Oct 23, 2003
- Sia Choon Beng
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Method for fabricating semiconductor devices with reduced junction...

Transformer with effective high turn ratio

Tunable high quality factor inductor

Method for fabricating semiconductor devices with reduced junction...

Reduced metal pipe formation in metal silicide contacts

Method of forming a gate stack structure

Method for forming a shallow junction region using defect engineeri...

Memory card molding apparatus and process

Integrated transformer and method of fabrication thereof

MOSFET device with low gate contact resistance

System and method for designing semiconductor photomasks

Process to reduce substrate effects by forming channels under induc...

Self-aligned lateral heterojunction bipolar transistor

Method and apparatus for a heterojunction bipolar transistor using...

Method and apparatus for performing nickel salicidation

Heterojunction bipolar transistor using reverse emitter window

Lateral heterojunction bipolar transistor and method of manufacture...

Process to manufacture nonvolatile MOS memory device

Heterojunction bipolar transistor with self-aligned emitter and sid...

Self-aligned lateral heterojunction bipolar transistor

Method to fill a trench and tunnel by using ALD seed layer and elec...

Method and apparatus for performing nickel salicidation

Heterojunction BiCMOS semiconductor

Technique to achieve thick silicide film for ultra-shallow junctions

Process to reduce substrate effects by forming channels under induc...

Method of making direct contact on gate by using dielectric stop layer

Method of forming an inductor with continuous metal deposition

Method to enhance inductor Q factor by forming air gaps below induc...

Low noise inductor using electrically floating high resistive and g...

Method of forming a surface coating layer within an opening within...

Patents Applicationslast 30 patents

METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH REDUCED JUNCTION...

METHOD FOR FORMING A SHALLOW JUNCTION REGION USING DEFECT ENGINEERI...

METHOD OF FORMING A GATE STACK STRUCTURE

TUNABLE HIGH QUALITY FACTOR INDUCTOR

REDUCED METAL PIPE FORMATION IN METAL SILICIDE CONTACTS

METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH REDUCED JUNCTION...

INTEGRATED TRANSFORMER AND METHOD OF FABRICATION THEREOF

TRANSFORMER WITH EFFECTIVE HIGH TURN RATIO

MEMORY CARD MOLDING APPARATUS AND PROCESS

System and method for designing semiconductor photomasks

Self-aligned lateral heterojunction bipolar transistor

Method and apparatus for performing nickel salicidation

Heterojunction BiCMOS integrated circuits and method therefor

Method of making direct contact on gate by using dielectric stop layer

Method of forming an inductor with continuous metal deposition

Lateral heterojunction bipolar transistor and method of manufacture...

SELF-ALIGNED LATERAL HETEROJUNCTION BIPOLAR TRANSISTOR

HETEROJUNCTION BICMOS SEMICONDUCTOR

Method and apparatus for a heterojunction bipolar transistor using...

Heterojunction bipolar transistor with self-aligned emitter and sid...

Heterojunction bipolar transistor using reverse emitter window

Process to manufacture nonvolatile MOS memory device

METHOD OF MAKING DIRECT CONTACT ON GATE BY USING DIELECTRIC STOP LAYER

Process to reduce substrate effects by forming channels under induc...

Method to fill a trench and tunnel by using ALD seed layer and elec...

Method of forming an inductor with continuous metal deposition

Process to reduce substrate effects by forming channels under induc...

Novel technique to achieve thick silicide film for ultra-shallow ju...

Application of single exposure alternating aperture phase shift mas...

Low noise inductor using electrically floating high resistive and g...