Larry J. Koudele

Person

Superior, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dynamic temperature compensation in a memory component
- Patent number 12,141,443
- Issue date Nov 12, 2024
- Larry J. Koudele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjustment of a starting voltage corresponding to a program operati...
- Patent number 12,125,539
- Issue date Oct 22, 2024
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for detection and interpretation of results indicated on a p...
- Patent number 12,061,196
- Issue date Aug 13, 2024
- MFB Fertility, Inc.
- Larry Joseph Koudele
- G01 - MEASURING TESTING
Information Patent Grant
Adjustment of program verify targets corresponding to a last progra...
- Patent number 12,040,026
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with dynamic processing level calibration
- Patent number 12,001,286
- Issue date Jun 4, 2024
- Micron Technology, Inc.
- Larry J. Koudele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Closing block family based on soft and hard closure criteria
- Patent number 11,940,892
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combination scan management for block families of a memory device
- Patent number 11,941,277
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Shane Nowell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with dynamic program-verify voltage calibration
- Patent number 11,934,666
- Issue date Mar 19, 2024
- Micron Technology, Inc.
- Larry J. Koudele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selection of read offset values in a memory sub-system based on tem...
- Patent number 11,923,021
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Grant
Error avoidance based on voltage distribution parameters of block f...
- Patent number 11,915,776
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
First-pass continuous read level calibration
- Patent number 11,908,536
- Issue date Feb 20, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Block family-based error avoidance for memory devices
- Patent number 11,886,726
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combining sets of memory blocks in a memory device
- Patent number 11,853,556
- Issue date Dec 26, 2023
- Micron Technology, Inc.
- Steven Michael Kientz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Open block family duration limited by temperature variation
- Patent number 11,842,061
- Issue date Dec 12, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage offset bin selection by die group for memory devices
- Patent number 11,837,291
- Issue date Dec 5, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating embedded data in memory cells in a memory sub-system
- Patent number 11,817,152
- Issue date Nov 14, 2023
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Estimation of read level thresholds using a data structure
- Patent number 11,789,640
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block family combination and voltage bin selection
- Patent number 11,755,478
- Issue date Sep 12, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic program erase targeting with bit error rate
- Patent number 11,742,027
- Issue date Aug 29, 2023
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error avoidance based on voltage distribution parameters of blocks
- Patent number 11,735,254
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Shane Nowell
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with dynamic calibration using a variable adjustment...
- Patent number 11,733,929
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing threshold voltage offset bin selection by package for me...
- Patent number 11,727,994
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with dynamic calibration using a trim management mech...
- Patent number 11,721,399
- Issue date Aug 8, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic background scan optimization in a memory sub-system
- Patent number 11,714,580
- Issue date Aug 1, 2023
- Micron Technology, Inc.
- Gerald L. Cadloni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing data of a memory system based on an adjustable error rate
- Patent number 11,714,710
- Issue date Aug 1, 2023
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error avoidance based on voltage distribution parameters
- Patent number 11,705,193
- Issue date Jul 18, 2023
- Micron Technology, Inc.
- Shane Nowell
- G11 - INFORMATION STORAGE
Information Patent Grant
Read level calibration in memory devices using embedded servo cells
- Patent number 11,705,208
- Issue date Jul 18, 2023
- Micron Technology, Inc.
- Larry J. Koudele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Charge loss scan operation management in memory devices
- Patent number 11,704,217
- Issue date Jul 18, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple open block families supporting multiple cursors of a memor...
- Patent number 11,675,509
- Issue date Jun 13, 2023
- Micron Technology, Inc.
- Shane Nowell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Associating multiple cursors with block family of memory device
- Patent number 11,675,511
- Issue date Jun 13, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DYNAMIC TEMPERATURE COMPENSATION IN A MEMORY COMPONENT
- Publication number 20250044948
- Publication date Feb 6, 2025
- Lodestar Licensing Group, LLC
- Larry J. Koudele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...
- Publication number 20240331780
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH DYNAMIC PROCESSING LEVEL CALIBRATION
- Publication number 20240289226
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Larry J. Koudele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOSING BLOCK FAMILY BASED ON SOFT AND HARD CLOSURE CRITERIA
- Publication number 20240168670
- Publication date May 23, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCK FAMILY-BASED ERROR AVOIDANCE FOR MEMORY DEVICES
- Publication number 20240111445
- Publication date Apr 4, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPEN BLOCK FAMILY DURATION LIMITED BY TEMPERATURE VARIATION
- Publication number 20240045605
- Publication date Feb 8, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINATION SCAN MANAGEMENT FOR BLOCK FAMILIES OF A MEMORY DEVICE
- Publication number 20230205442
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Shane Nowell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPEN BLOCK FAMILY DURATION LIMITED BY TIME AND TEMPERATURE
- Publication number 20230153003
- Publication date May 18, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTION OF READ OFFSET VALUES IN A MEMORY SUB-SYSTEM BASED ON TEM...
- Publication number 20230141893
- Publication date May 11, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Application
FIRST-PASS CONTINUOUS READ LEVEL CALIBRATION
- Publication number 20230054653
- Publication date Feb 23, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCK F...
- Publication number 20230012855
- Publication date Jan 19, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
GENERATING EMBEDDED DATA IN MEMORY CELLS IN A MEMORY SUB-SYSTEM
- Publication number 20220406381
- Publication date Dec 22, 2022
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH DYNAMIC CALIBRATION USING A VARIABLE ADJUSTMENT...
- Publication number 20220391143
- Publication date Dec 8, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC BACKGROUND SCAN OPTIMIZATION IN A MEMORY SUB-SYSTEM
- Publication number 20220350538
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Gerald L. Cadloni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOSING BLOCK FAMILY BASED ON SOFT AND HARD CLOSURE CRITERIA
- Publication number 20220350718
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTMENT OF A STARTING VOLTAGE CORRESPONDING TO A PROGRAM OPERATI...
- Publication number 20220343981
- Publication date Oct 27, 2022
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASSOCIATING MULTIPLE CURSORS WITH BLOCK FAMILY OF MEMORY DEVICE
- Publication number 20220334721
- Publication date Oct 20, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCKS
- Publication number 20220319589
- Publication date Oct 6, 2022
- Micron Technology, Inc.
- Shane Nowell
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCK F...
- Publication number 20220319630
- Publication date Oct 6, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
COMBINING SETS OF MEMORY BLOCKS IN A MEMORY DEVICE
- Publication number 20220300166
- Publication date Sep 22, 2022
- Micron Technology, Inc.
- Steven Michael Kientz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH DYNAMIC PROGRAM-VERIFY VOLTAGE CALIBRATION
- Publication number 20220291847
- Publication date Sep 15, 2022
- Micron Technology, Inc.
- Larry J. Koudele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PROGRAM ERASE TARGETING WITH BIT ERROR RATE
- Publication number 20220284967
- Publication date Sep 8, 2022
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH DYNAMIC PROCESSING LEVEL CALIBRATION
- Publication number 20220276930
- Publication date Sep 1, 2022
- Micron Technology, Inc.
- Larry J. Koudele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC TEMPERATURE COMPENSATION IN A MEMORY COMPONENT
- Publication number 20220269420
- Publication date Aug 25, 2022
- Micron Technology, Inc.
- Larry J. Koudele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS
- Publication number 20220246207
- Publication date Aug 4, 2022
- Micron Technology, Inc.
- Shane Nowell
- G11 - INFORMATION STORAGE
Information Patent Application
CHARGE LOSS SCAN OPERATION MANAGEMENT IN MEMORY DEVICES
- Publication number 20220237094
- Publication date Jul 28, 2022
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINATION SCAN MANAGEMENT FOR BLOCK FAMILIES OF A MEMORY DEVICE
- Publication number 20220164105
- Publication date May 26, 2022
- Micron Technology, Inc.
- Shane Nowell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEMPERATURE-BASED BLOCK FAMILY COMBINATIONS IN A MEMORY DEVICE
- Publication number 20220164112
- Publication date May 26, 2022
- Micron Technology, Inc.
- Steven Michael Kientz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE OFFSET BIN SELECTION BY DIE GROUP FOR MEMORY DEVICES
- Publication number 20220157385
- Publication date May 19, 2022
- Micron Technology, Inc.
- Vamsi Pavan RAYAPROLU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCK FAMILY COMBINATION AND VOLTAGE BIN SELECTION
- Publication number 20220156188
- Publication date May 19, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING

Larry J. Koudele

Person

Patents Grantslast 30 patents

Dynamic temperature compensation in a memory component

Adjustment of a starting voltage corresponding to a program operati...

Method for detection and interpretation of results indicated on a p...

Adjustment of program verify targets corresponding to a last progra...

Memory device with dynamic processing level calibration

Closing block family based on soft and hard closure criteria

Combination scan management for block families of a memory device

Memory device with dynamic program-verify voltage calibration

Selection of read offset values in a memory sub-system based on tem...

Error avoidance based on voltage distribution parameters of block f...

First-pass continuous read level calibration

Block family-based error avoidance for memory devices

Combining sets of memory blocks in a memory device

Open block family duration limited by temperature variation

Voltage offset bin selection by die group for memory devices

Generating embedded data in memory cells in a memory sub-system

Estimation of read level thresholds using a data structure

Block family combination and voltage bin selection

Dynamic program erase targeting with bit error rate

Error avoidance based on voltage distribution parameters of blocks

Memory system with dynamic calibration using a variable adjustment...

Performing threshold voltage offset bin selection by package for me...

Memory system with dynamic calibration using a trim management mech...

Dynamic background scan optimization in a memory sub-system

Providing data of a memory system based on an adjustable error rate

Error avoidance based on voltage distribution parameters

Read level calibration in memory devices using embedded servo cells

Charge loss scan operation management in memory devices

Multiple open block families supporting multiple cursors of a memor...

Associating multiple cursors with block family of memory device

Patents Applicationslast 30 patents

DYNAMIC TEMPERATURE COMPENSATION IN A MEMORY COMPONENT

ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...

MEMORY DEVICE WITH DYNAMIC PROCESSING LEVEL CALIBRATION

CLOSING BLOCK FAMILY BASED ON SOFT AND HARD CLOSURE CRITERIA

BLOCK FAMILY-BASED ERROR AVOIDANCE FOR MEMORY DEVICES

OPEN BLOCK FAMILY DURATION LIMITED BY TEMPERATURE VARIATION

COMBINATION SCAN MANAGEMENT FOR BLOCK FAMILIES OF A MEMORY DEVICE

OPEN BLOCK FAMILY DURATION LIMITED BY TIME AND TEMPERATURE

SELECTION OF READ OFFSET VALUES IN A MEMORY SUB-SYSTEM BASED ON TEM...

FIRST-PASS CONTINUOUS READ LEVEL CALIBRATION

ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCK F...

GENERATING EMBEDDED DATA IN MEMORY CELLS IN A MEMORY SUB-SYSTEM

MEMORY SYSTEM WITH DYNAMIC CALIBRATION USING A VARIABLE ADJUSTMENT...

DYNAMIC BACKGROUND SCAN OPTIMIZATION IN A MEMORY SUB-SYSTEM

CLOSING BLOCK FAMILY BASED ON SOFT AND HARD CLOSURE CRITERIA

ADJUSTMENT OF A STARTING VOLTAGE CORRESPONDING TO A PROGRAM OPERATI...

ASSOCIATING MULTIPLE CURSORS WITH BLOCK FAMILY OF MEMORY DEVICE

ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCKS

ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCK F...

COMBINING SETS OF MEMORY BLOCKS IN A MEMORY DEVICE

MEMORY DEVICE WITH DYNAMIC PROGRAM-VERIFY VOLTAGE CALIBRATION

DYNAMIC PROGRAM ERASE TARGETING WITH BIT ERROR RATE

MEMORY DEVICE WITH DYNAMIC PROCESSING LEVEL CALIBRATION

DYNAMIC TEMPERATURE COMPENSATION IN A MEMORY COMPONENT

ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS

CHARGE LOSS SCAN OPERATION MANAGEMENT IN MEMORY DEVICES

COMBINATION SCAN MANAGEMENT FOR BLOCK FAMILIES OF A MEMORY DEVICE

TEMPERATURE-BASED BLOCK FAMILY COMBINATIONS IN A MEMORY DEVICE

VOLTAGE OFFSET BIN SELECTION BY DIE GROUP FOR MEMORY DEVICES

BLOCK FAMILY COMBINATION AND VOLTAGE BIN SELECTION