Larry M. Mennemeier

Person

Boulder Creek, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Orderly storing of corresponding packed bytes from first and second...
- Patent number 9,389,858
- Issue date Jul 12, 2016
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packing saturated lower 8-bit elements from two source registers of...
- Patent number 9,361,100
- Issue date Jun 7, 2016
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interleaving half of packed data elements of size specified in inst...
- Patent number 9,223,572
- Issue date Dec 29, 2015
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Executing unpack instruction and pack instruction with saturation o...
- Patent number 9,182,983
- Issue date Nov 10, 2015
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor executing unpack and pack instructions specifying two sou...
- Patent number 9,141,387
- Issue date Sep 22, 2015
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packing in destination register half of each element with saturatio...
- Patent number 9,116,687
- Issue date Aug 25, 2015
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packing odd bytes from two source registers of packed data
- Patent number 9,015,453
- Issue date Apr 21, 2015
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packing lower half bits of signed data elements in two source regis...
- Patent number 8,838,946
- Issue date Sep 16, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for unpacking and moving packed data
- Patent number 8,793,475
- Issue date Jul 29, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,793,299
- Issue date Jul 29, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,745,119
- Issue date Jun 3, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,725,787
- Issue date May 13, 2014
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packing signed word elements from two source registers to saturated...
- Patent number 8,639,914
- Issue date Jan 28, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing multiply-add operations on pack...
- Patent number 8,626,814
- Issue date Jan 7, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Execution of instruction with element size control bit to interleav...
- Patent number 8,601,246
- Issue date Dec 3, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interleaving corresponding data elements from part of two source re...
- Patent number 8,521,994
- Issue date Aug 27, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,495,123
- Issue date Jul 23, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor executing pack and unpack instructions
- Patent number 8,495,346
- Issue date Jul 23, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,396,915
- Issue date Mar 12, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packing two packed signed data in registers with saturation
- Patent number 8,190,867
- Issue date May 29, 2012
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,185,571
- Issue date May 22, 2012
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interleaving saturated lower half of data elements from two source...
- Patent number 7,966,482
- Issue date Jun 21, 2011
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing multiply-add operations on pack...
- Patent number 7,509,367
- Issue date Mar 24, 2009
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for executing packed shift operations
- Patent number 7,480,686
- Issue date Jan 20, 2009
- Intel Corporation
- Derrick Chu Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing packed shift operations in a pro...
- Patent number 7,461,109
- Issue date Dec 2, 2008
- Intel Corporation
- Derrick Chu Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing packed shift operations in a pro...
- Patent number 7,451,169
- Issue date Nov 11, 2008
- Intel Corporation
- Derrick Chu Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing multiply-add operations on pack...
- Patent number 7,424,505
- Issue date Sep 9, 2008
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing multiply-add operations on pack...
- Patent number 7,395,298
- Issue date Jul 1, 2008
- Intel Corporation
- Eric Debes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Emptying packed data state during execution of packed data instruct...
- Patent number 7,373,490
- Issue date May 13, 2008
- Intel Corporation
- David Bistry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with instructions that operate on different data types st...
- Patent number 7,149,882
- Issue date Dec 12, 2006
- Intel Corporation
- Andrew F. Glew
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130262547
- Publication date Oct 3, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130262836
- Publication date Oct 3, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130219151
- Publication date Aug 22, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130198254
- Publication date Aug 1, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130124830
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130124834
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Packing Packed Data
- Publication number 20130124831
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130124833
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130124832
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Packing Packed Data
- Publication number 20130124835
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Packing Packed Data
- Publication number 20130117539
- Publication date May 9, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130117538
- Publication date May 9, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR UNPACKING PACKED DATA
- Publication number 20130117540
- Publication date May 9, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130117537
- Publication date May 9, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking and Moving Packed Data
- Publication number 20130117547
- Publication date May 9, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130091190
- Publication date Apr 11, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20120331028
- Publication date Dec 27, 2012
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20120216018
- Publication date Aug 23, 2012
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor Having Novel Operations
- Publication number 20120198210
- Publication date Aug 2, 2012
- ALEXANDER PELEG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACK...
- Publication number 20110264895
- Publication date Oct 27, 2011
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor having novel operations
- Publication number 20110219214
- Publication date Sep 8, 2011
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PACKING DATA
- Publication number 20110093682
- Publication date Apr 21, 2011
- ALEXANDER PELEG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20090265409
- Publication date Oct 22, 2009
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PROVIDING PACKED SHIFT OPERATIONS IN A PRO...
- Publication number 20070239810
- Publication date Oct 11, 2007
- Derrick Chu Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for providing packed shift operations in a pro...
- Publication number 20060235914
- Publication date Oct 19, 2006
- Derrick Chu Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for packing data
- Publication number 20060236076
- Publication date Oct 19, 2006
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for providing packed shift operations in a pro...
- Publication number 20050219897
- Publication date Oct 6, 2005
- Derrick Chu Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with instructions that operate on different data types st...
- Publication number 20050038977
- Publication date Feb 17, 2005
- Andrew F. Glew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for performing multiply-add operations on pack...
- Publication number 20040220992
- Publication date Nov 4, 2004
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for executing packed shift operations
- Publication number 20040215681
- Publication date Oct 28, 2004
- Derrick Chu Lin
- G06 - COMPUTING CALCULATING COUNTING

Larry M. Mennemeier

Person

Patents Grantslast 30 patents

Orderly storing of corresponding packed bytes from first and second...

Packing saturated lower 8-bit elements from two source registers of...

Interleaving half of packed data elements of size specified in inst...

Executing unpack instruction and pack instruction with saturation o...

Processor executing unpack and pack instructions specifying two sou...

Packing in destination register half of each element with saturatio...

Packing odd bytes from two source registers of packed data

Packing lower half bits of signed data elements in two source regis...

Method and apparatus for unpacking and moving packed data

Processor for performing multiply-add operations on packed data

Processor for performing multiply-add operations on packed data

Processor for performing multiply-add operations on packed data

Packing signed word elements from two source registers to saturated...

Method and apparatus for performing multiply-add operations on pack...

Execution of instruction with element size control bit to interleav...

Interleaving corresponding data elements from part of two source re...

Processor for performing multiply-add operations on packed data

Processor executing pack and unpack instructions

Processor for performing multiply-add operations on packed data

Packing two packed signed data in registers with saturation

Processor for performing multiply-add operations on packed data

Interleaving saturated lower half of data elements from two source...

Method and apparatus for performing multiply-add operations on pack...

Method and apparatus for executing packed shift operations

Method and apparatus for providing packed shift operations in a pro...

Method and apparatus for providing packed shift operations in a pro...

Method and apparatus for performing multiply-add operations on pack...

Method and apparatus for performing multiply-add operations on pack...

Emptying packed data state during execution of packed data instruct...

Processor with instructions that operate on different data types st...

Patents Applicationslast 30 patents

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

Method and Apparatus for Unpacking Packed Data

Method and Apparatus for Unpacking Packed Data

Method and Apparatus for Packing Packed Data

Method and Apparatus for Unpacking Packed Data

Method and Apparatus for Unpacking Packed Data

Method and Apparatus for Packing Packed Data

Method and Apparatus for Packing Packed Data

Method and Apparatus for Unpacking Packed Data

METHOD AND APPARATUS FOR UNPACKING PACKED DATA

Method and Apparatus for Unpacking Packed Data

Method and Apparatus for Unpacking and Moving Packed Data

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

Microprocessor Having Novel Operations

METHOD AND APPARATUS FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACK...

Microprocessor having novel operations

METHOD AND APPARATUS FOR PACKING DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

METHOD AND APPARATUS FOR PROVIDING PACKED SHIFT OPERATIONS IN A PRO...

Method and apparatus for providing packed shift operations in a pro...

Method and apparatus for packing data

Method and apparatus for providing packed shift operations in a pro...

Processor with instructions that operate on different data types st...

Method and apparatus for performing multiply-add operations on pack...

Method and apparatus for executing packed shift operations