Laung-Terng Wang

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for broadcasting scan patterns in a scan-based...
- Patent number 9,696,377
- Issue date Jul 4, 2017
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT method for detecting or locating crossing cloc...
- Patent number 9,678,156
- Issue date Jun 13, 2017
- SYNTEST TECHNOLOGIES, INC.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple-capture DFT system for detecting or locating crossing cloc...
- Patent number 9,316,688
- Issue date Apr 19, 2016
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for detecting or locating crossing cloc...
- Patent number 9,274,168
- Issue date Mar 1, 2016
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for broadcasting scan patterns in a scan-based...
- Patent number 9,121,902
- Issue date Sep 1, 2015
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for broadcasting scan patterns in a scan-based...
- Patent number 9,110,139
- Issue date Aug 18, 2015
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for detecting or locating crossing cloc...
- Patent number 9,091,730
- Issue date Jul 28, 2015
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for detecting or locating crossing cloc...
- Patent number 9,057,763
- Issue date Jun 16, 2015
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Computer-aided design (CAD) multiple-capture DFT system for detecti...
- Patent number 9,046,572
- Issue date Jun 2, 2015
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for detecting or locating crossing cloc...
- Patent number 9,026,875
- Issue date May 5, 2015
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for hybrid ring generator design
- Patent number 8,949,299
- Issue date Feb 3, 2015
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer-aided design system to automate scan synthesis at register...
- Patent number 8,775,985
- Issue date Jul 8, 2014
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for broadcasting scan patterns in a scan-based...
- Patent number 8,667,451
- Issue date Mar 4, 2014
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Computer-aided design system to automate scan synthesis at register...
- Patent number 8,543,950
- Issue date Sep 24, 2013
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for testing 3D integrated circuits
- Patent number 8,522,096
- Issue date Aug 27, 2013
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system to reduce peak capture power during sel...
- Patent number 8,458,544
- Issue date Jun 4, 2013
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Robust scan synthesis for protecting soft errors
- Patent number 8,418,100
- Issue date Apr 9, 2013
- STARDFX Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for protecting soft errors
- Patent number 8,402,328
- Issue date Mar 19, 2013
- STARDFX Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for low-pin-count scan compression
- Patent number 8,335,954
- Issue date Dec 18, 2012
- Syntest Technologies, Inc.
- Nur A. Touba
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for low-pin-count scan compression
- Patent number 8,230,282
- Issue date Jul 24, 2012
- Syntest Technologies, Inc.
- Nur A. Touba
- G01 - MEASURING TESTING
Information Patent Grant
Computer-aided design system to automate scan synthesis at register...
- Patent number 8,219,945
- Issue date Jul 10, 2012
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Robust scan synthesis for protecting soft errors
- Patent number 8,161,441
- Issue date Apr 17, 2012
- STARDFX Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system to reduce peak capture power during sel...
- Patent number 8,091,002
- Issue date Jan 3, 2012
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for low-pin-count scan compression
- Patent number 7,996,741
- Issue date Aug 9, 2011
- Syntest Technologies, Inc.
- Nur A. Touba
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for unifying self-test with scan-test during p...
- Patent number 7,945,830
- Issue date May 17, 2011
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) Wang
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for pipelined scan compression
- Patent number 7,945,833
- Issue date May 17, 2011
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) Wang
- G01 - MEASURING TESTING
Information Patent Grant
X-canceling multiple-input signature register (MISR) for compacting...
- Patent number 7,925,947
- Issue date Apr 12, 2011
- Syntest Technologies, Inc.
- Nur A. Touba
- G01 - MEASURING TESTING
Information Patent Grant
Multiple-capture DFT system for scan-based integrated circuits
- Patent number 7,904,773
- Issue date Mar 8, 2011
- Syntest Technologies, Inc.
- Laung-Terng (L. T.) Wang
- G01 - MEASURING TESTING
Information Patent Grant
Computer-aided design system to automate scan synthesis at register...
- Patent number 7,904,857
- Issue date Mar 8, 2011
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus for redundancy reconfiguration of faculty memories
- Patent number 7,783,940
- Issue date Aug 24, 2010
- Syntest Technologies, Inc.
- Lizhen Yu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLE-CAPTURE DFT METHOD FOR DETECTING OR LOCATING CROSSING CLOC...
- Publication number 20160131707
- Publication date May 12, 2016
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
MULTIPLE-CAPTURE DFT SYSTEM FOR DETECTING OR LOCATING CROSSING CLOC...
- Publication number 20150338465
- Publication date Nov 26, 2015
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus for Broadcasting Scan Patterns in a Scan-Based...
- Publication number 20150338461
- Publication date Nov 26, 2015
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
MULTIPLE-CAPTURE DFT SYSTEM FOR DETECTING OR LOCATING CROSSING CLOC...
- Publication number 20150316616
- Publication date Nov 5, 2015
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus for Broadcasting Scan Patterns in a Scan-Based...
- Publication number 20140344636
- Publication date Nov 20, 2014
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Multiple-Capture DFT System for Detecting or Locating Crossing Cloc...
- Publication number 20140223251
- Publication date Aug 7, 2014
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus for Broadcasting Scan Patterns in a Scan-Based...
- Publication number 20140149816
- Publication date May 29, 2014
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR LOW-PIN-COUNT SCAN COMPRESSION
- Publication number 20140143623
- Publication date May 22, 2014
- Syntest Technologies, Inc.
- Nur A. TOUBA
- G01 - MEASURING TESTING
Information Patent Application
Multiple-Capture DFT System for Detecting or Locating Crossing Cloc...
- Publication number 20140082446
- Publication date Mar 20, 2014
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Multiple-Capture DFT System for Detecting or Locating Crossing Cloc...
- Publication number 20140075256
- Publication date Mar 13, 2014
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
Computer-Aided Design (CAD) Multiple-Capture DFT System for Detecti...
- Publication number 20140075257
- Publication date Mar 13, 2014
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
X-Tracer: A Reconfigurable X-Tolerance Trace Compressor for Silicon...
- Publication number 20130326281
- Publication date Dec 5, 2013
- Qiang Xu
- G01 - MEASURING TESTING
Information Patent Application
Method for Unified High-Level Hardware Description Language Simulat...
- Publication number 20130304450
- Publication date Nov 14, 2013
- StarDFX Technologies, Inc.
- Tso-Sheng Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...
- Publication number 20130305200
- Publication date Nov 14, 2013
- Laung-Terng WANG
- G01 - MEASURING TESTING
Information Patent Application
Multiple-Capture DFT System for Detecting or Locating Crossing Cloc...
- Publication number 20130268818
- Publication date Oct 10, 2013
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR HYBRID RING GENERATOR DESIGN
- Publication number 20130036146
- Publication date Feb 7, 2013
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR BROADCASTING SCAN PATTERNS IN A SCAN-BASED...
- Publication number 20120331361
- Publication date Dec 27, 2012
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) WANG
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR LOW-PIN-COUNT SCAN COMPRESSION
- Publication number 20120266036
- Publication date Oct 18, 2012
- Syntest Technologies, Inc.
- Nur A. TOUBA
- G01 - MEASURING TESTING
Information Patent Application
COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...
- Publication number 20120246604
- Publication date Sep 27, 2012
- Syntest Technologies, Inc.
- Laung-Terng (L. -T.) WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROBUST SCAN SYNTHESIS FOR PROTECTING SOFT ERRORS
- Publication number 20120173940
- Publication date Jul 5, 2012
- StarDFX Technologies, Inc.
- Laung-Terng WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE-CAPTURE DFT SYSTEM TO REDUCE PEAK CAPTURE POWER DURING SEL...
- Publication number 20120166903
- Publication date Jun 28, 2012
- Syntest Technologies, Inc.
- Laung-Terng WANG
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR TESTING 3D INTEGRATED CIRCUITS
- Publication number 20120110402
- Publication date May 3, 2012
- Syntest Technologies, Inc.
- Laung-Terng Wang
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR LOW-PIN-COUNT SCAN COMPRESSION
- Publication number 20110258501
- Publication date Oct 20, 2011
- Sytest Technologies, Inc.
- Nur A. TOUBA
- G01 - MEASURING TESTING
Information Patent Application
COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...
- Publication number 20110197171
- Publication date Aug 11, 2011
- Syntest Technologies, Inc.
- Laung-Terng (L.-T.) WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR LOW-PIN-COUNT SCAN COMPRESSION
- Publication number 20110047426
- Publication date Feb 24, 2011
- Nur A. TOUBA
- G01 - MEASURING TESTING
Information Patent Application
APPARATUS AND METHOD FOR PROTECTING SOFT ERRORS
- Publication number 20110022909
- Publication date Jan 27, 2011
- Laung-Terng WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FPGA Test Configuration Minimization
- Publication number 20110022907
- Publication date Jan 27, 2011
- StarDFX Technologies, Inc.
- Zhigang Jiang
- G01 - MEASURING TESTING
Information Patent Application
ROBUST SCAN SYNTHESIS FOR PROTECTING SOFT ERRORS
- Publication number 20110022908
- Publication date Jan 27, 2011
- StarDFX Technologies, Inc.
- Laung-Terng WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE-CAPTURE DFT SYSTEM TO REDUCE PEAK CAPTURE POWER DURING SEL...
- Publication number 20100287430
- Publication date Nov 11, 2010
- Syntest Technologies, Inc.
- Laung-Terng WANG
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus for Unifying Self-Test with Scan-Test During P...
- Publication number 20100218062
- Publication date Aug 26, 2010
- Laung-Terng (L.-T.) WANG
- G06 - COMPUTING CALCULATING COUNTING

Laung-Terng Wang

Person

Patents Grantslast 30 patents

Method and apparatus for broadcasting scan patterns in a scan-based...

Multiple-capture DFT method for detecting or locating crossing cloc...

Multiple-capture DFT system for detecting or locating crossing cloc...

Multiple-capture DFT system for detecting or locating crossing cloc...

Method and apparatus for broadcasting scan patterns in a scan-based...

Method and apparatus for broadcasting scan patterns in a scan-based...

Multiple-capture DFT system for detecting or locating crossing cloc...

Multiple-capture DFT system for detecting or locating crossing cloc...

Computer-aided design (CAD) multiple-capture DFT system for detecti...

Multiple-capture DFT system for detecting or locating crossing cloc...

Method and apparatus for hybrid ring generator design

Computer-aided design system to automate scan synthesis at register...

Method and apparatus for broadcasting scan patterns in a scan-based...

Computer-aided design system to automate scan synthesis at register...

Method and apparatus for testing 3D integrated circuits

Multiple-capture DFT system to reduce peak capture power during sel...

Robust scan synthesis for protecting soft errors

Apparatus and method for protecting soft errors

Method and apparatus for low-pin-count scan compression

Method and apparatus for low-pin-count scan compression

Computer-aided design system to automate scan synthesis at register...

Robust scan synthesis for protecting soft errors

Multiple-capture DFT system to reduce peak capture power during sel...

Method and apparatus for low-pin-count scan compression

Method and apparatus for unifying self-test with scan-test during p...

Method and apparatus for pipelined scan compression

X-canceling multiple-input signature register (MISR) for compacting...

Multiple-capture DFT system for scan-based integrated circuits

Computer-aided design system to automate scan synthesis at register...

Apparatus for redundancy reconfiguration of faculty memories

Patents Applicationslast 30 patents

MULTIPLE-CAPTURE DFT METHOD FOR DETECTING OR LOCATING CROSSING CLOC...

MULTIPLE-CAPTURE DFT SYSTEM FOR DETECTING OR LOCATING CROSSING CLOC...

Method and Apparatus for Broadcasting Scan Patterns in a Scan-Based...

MULTIPLE-CAPTURE DFT SYSTEM FOR DETECTING OR LOCATING CROSSING CLOC...

Method and Apparatus for Broadcasting Scan Patterns in a Scan-Based...

Multiple-Capture DFT System for Detecting or Locating Crossing Cloc...

Method and Apparatus for Broadcasting Scan Patterns in a Scan-Based...

METHOD AND APPARATUS FOR LOW-PIN-COUNT SCAN COMPRESSION

Multiple-Capture DFT System for Detecting or Locating Crossing Cloc...

Multiple-Capture DFT System for Detecting or Locating Crossing Cloc...

Computer-Aided Design (CAD) Multiple-Capture DFT System for Detecti...

X-Tracer: A Reconfigurable X-Tolerance Trace Compressor for Silicon...

Method for Unified High-Level Hardware Description Language Simulat...

COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...

Multiple-Capture DFT System for Detecting or Locating Crossing Cloc...

METHOD AND APPARATUS FOR HYBRID RING GENERATOR DESIGN

METHOD AND APPARATUS FOR BROADCASTING SCAN PATTERNS IN A SCAN-BASED...

METHOD AND APPARATUS FOR LOW-PIN-COUNT SCAN COMPRESSION

COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...

ROBUST SCAN SYNTHESIS FOR PROTECTING SOFT ERRORS

MULTIPLE-CAPTURE DFT SYSTEM TO REDUCE PEAK CAPTURE POWER DURING SEL...

METHOD AND APPARATUS FOR TESTING 3D INTEGRATED CIRCUITS

METHOD AND APPARATUS FOR LOW-PIN-COUNT SCAN COMPRESSION

COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER...

METHOD AND APPARATUS FOR LOW-PIN-COUNT SCAN COMPRESSION

APPARATUS AND METHOD FOR PROTECTING SOFT ERRORS

FPGA Test Configuration Minimization

ROBUST SCAN SYNTHESIS FOR PROTECTING SOFT ERRORS

MULTIPLE-CAPTURE DFT SYSTEM TO REDUCE PEAK CAPTURE POWER DURING SEL...

Method and Apparatus for Unifying Self-Test with Scan-Test During P...