LAURENT MOLL

Person

SAN JOSE, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and memory with configurable error-correction code (ECC) dat...
- Patent number 11,728,003
- Issue date Aug 15, 2023
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Grant
Dram-aware caching
- Patent number 11,520,706
- Issue date Dec 6, 2022
- QUALCOMM Incorporated
- Alain Artieri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with system ECC
- Patent number 11,372,717
- Issue date Jun 28, 2022
- QUALCOMM Incorporated
- Jungwon Suh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with dynamic voltage scaling
- Patent number 11,295,803
- Issue date Apr 5, 2022
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Grant
STLB prefetching for a multi-dimension engine
- Patent number 9,852,081
- Issue date Dec 26, 2017
- QUALCOMM Incorporated
- Laurent Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid cache comprising coherent and non-coherent lines
- Patent number 9,760,498
- Issue date Sep 12, 2017
- QUALCOMM Incorporated
- Laurent Rene Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for a shared cache with adaptive partitioning
- Patent number 9,734,070
- Issue date Aug 15, 2017
- QUALCOMM Incorporated
- Alain Artieri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coherency controller with reduced data buffer
- Patent number 9,639,469
- Issue date May 2, 2017
- QUALCOMM Technologies, Inc.
- Laurent Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive tuning of snoops
- Patent number 9,563,560
- Issue date Feb 7, 2017
- QUALCOMM Technologies, Inc.
- Laurent Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DMA engine with STLB prefetch capabilities and tethered prefetching
- Patent number 9,465,749
- Issue date Oct 11, 2016
- QUALCOMM Technologies, Inc.
- Laurent Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System translation look-aside buffer integrated in an interconnect
- Patent number 9,396,130
- Issue date Jul 19, 2016
- QUALCOMM Technologies, Inc.
- Philippe Boucard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simplified controller with partial coherency
- Patent number 9,170,949
- Issue date Oct 27, 2015
- QUALCOMM Technologies, Inc.
- Laurent Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System translation look-aside buffer with request-based allocation...
- Patent number 9,141,556
- Issue date Sep 22, 2015
- QUALCOMM Technologies, Inc.
- Laurent Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Training, power-gating, and dynamic frequency changing of a memory...
- Patent number 9,104,421
- Issue date Aug 11, 2015
- NVIDIA Corporation
- Sagheer Ahmad
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and system for advance wakeup from low-power sleep states
- Patent number 9,104,423
- Issue date Aug 11, 2015
- NVIDIA Corporation
- Sagheer Ahmad
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and apparatus for supporting target-side security in a cache...
- Patent number 8,930,638
- Issue date Jan 6, 2015
- QUALCOMM Technologies, Inc.
- Laurent Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transport of PCI-ordered traffic over independent networks
- Patent number 8,788,737
- Issue date Jul 22, 2014
- QUALCOMM Technologies, Inc.
- Philippe Boucard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual core management
- Patent number 8,225,315
- Issue date Jul 17, 2012
- Oracle America, Inc.
- Yu Qing Cheng
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Connectionless packet data transport over a connection-based point-...
- Patent number 8,208,470
- Issue date Jun 26, 2012
- Broadcom Corporation
- Manu Gulati
Information Patent Grant
Hypertransport/SPI-4 interface supporting configurable deskewing
- Patent number 8,176,229
- Issue date May 8, 2012
- Broadcom Corporation
- Laurent R. Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Small and power-efficient cache that can provide data for backgroun...
- Patent number 7,958,312
- Issue date Jun 7, 2011
- Oracle America, Inc.
- Laurent R. Moll
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Re-fetching cache memory enabling alternative operational modes
- Patent number 7,934,054
- Issue date Apr 26, 2011
- Oracle America, Inc.
- Laurent R. Moll
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Power conservation via DRAM access reduction
- Patent number 7,904,659
- Issue date Mar 8, 2011
- Oracle America, Inc.
- Laurent R. Moll
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Power conservation via DRAM access
- Patent number 7,899,990
- Issue date Mar 1, 2011
- Oracle America, Inc.
- Laurent R. Moll
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Re-fetching cache memory having coherent re-fetching
- Patent number 7,873,788
- Issue date Jan 18, 2011
- Oracle America, Inc.
- Laurent R. Moll
- G11 - INFORMATION STORAGE
Information Patent Grant
Virtual core management
- Patent number 7,802,073
- Issue date Sep 21, 2010
- Oracle America, Inc.
- Yu Qing Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual core management
- Patent number 7,797,512
- Issue date Sep 14, 2010
- Oracle America, Inc.
- Yu Qing Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for conserving power
- Patent number 7,797,563
- Issue date Sep 14, 2010
- Oracle America
- Laurent R. Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems including packet interfaces, switches, and packet DMA circu...
- Patent number 7,680,140
- Issue date Mar 16, 2010
- Broadcom Corporation
- Barton Sano
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reduced-power memory with per-sector power/ground control and early...
- Patent number 7,663,961
- Issue date Feb 16, 2010
- Sun Microsystems, Inc.
- Joseph B. Rowlands
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND MEMORY WITH CONFIGURABLE ERROR-CORRECTION CODE (ECC) DAT...
- Publication number 20230298682
- Publication date Sep 21, 2023
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Application
DRAM-AWARE CACHING
- Publication number 20220350749
- Publication date Nov 3, 2022
- QUALCOMM Incorporated
- Alain ARTIERI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND MEMORY WITH CONFIGURABLE ERROR-CORRECTION CODE (ECC) DAT...
- Publication number 20210358559
- Publication date Nov 18, 2021
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH SYSTEM ECC
- Publication number 20210064463
- Publication date Mar 4, 2021
- QUALCOMM Incorporated
- Jungwon SUH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH DYNAMIC VOLTAGE SCALING
- Publication number 20210065772
- Publication date Mar 4, 2021
- QUALCOMM Incorporated
- Jungwon SUH
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR A SHARED CACHE WITH ADAPTIVE PARTITIONING
- Publication number 20170116118
- Publication date Apr 27, 2017
- QUALCOMM Incorporated
- ALAIN ARTIERI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID CACHE COMPRISING COHERENT AND NON-COHERENT LINES
- Publication number 20160092360
- Publication date Mar 31, 2016
- QUALCOMM TECHNOLOGIES INC.
- Laurent Rene MOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SUPPORTING TARGET-SIDE SECURITY IN A CACHE...
- Publication number 20140149687
- Publication date May 29, 2014
- QUALCOMM TECHNOLOGIES, INC.
- Laurent Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMPLIFIED CONTROLLER WITH PARTIAL COHERENCY
- Publication number 20140108744
- Publication date Apr 17, 2014
- ARTERIS SAS
- Laurent MOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE TUNING OF SNOOPS
- Publication number 20140095807
- Publication date Apr 3, 2014
- QUALCOMM TECHNOLOGIES, INC.
- Laurent MOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENCY CONTROLLER WITH REDUCED DATA BUFFER
- Publication number 20140095809
- Publication date Apr 3, 2014
- QUALCOMM TECHNOLOGIES, INC.
- Laurent MOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE TUNING OF SNOOPS
- Publication number 20140095808
- Publication date Apr 3, 2014
- ARTERIS SAS
- Laurent MOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR IMPLEMENTING A CONTROL REGISTER ACCESS BUS
- Publication number 20140082238
- Publication date Mar 20, 2014
- NVIDIA Corporation
- Sagheer Ahmad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM TRANSLATION LOOK-ASIDE BUFFER INTEGRATED IN AN INTERCONNECT
- Publication number 20140052919
- Publication date Feb 20, 2014
- Arteris SAS
- Laurent MOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM TRANSLATION LOOK-ASIDE BUFFER WITH REQUEST-BASED ALLOCATION...
- Publication number 20140052954
- Publication date Feb 20, 2014
- Arteris SAS
- Laurent MOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DMA ENGINE WITH STLB PREFETCH CAPABILITIES AND TETHERED PREFETCHING
- Publication number 20140052955
- Publication date Feb 20, 2014
- Arteris SAS
- Laurent MOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STLB PREFETCHING FOR A MULTI-DIMENSION ENGINE
- Publication number 20140052956
- Publication date Feb 20, 2014
- Arteris SAS
- Laurent MOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRAINING, POWER-GATING, AND DYNAMIC FREQUENCY CHANGING OF A MEMORY...
- Publication number 20140032947
- Publication date Jan 30, 2014
- NVIDIA Corporation
- Sagheer Ahmad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR ADVANCE WAKEUP FROM LOW-POWER SLEEP STATES
- Publication number 20130311797
- Publication date Nov 21, 2013
- NVIDIA Corporation
- Sagheer Ahmad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSPORT OF PCI-ORDERED TRAFFIC OVER INDEPENDENT NETWORKS
- Publication number 20130166812
- Publication date Jun 27, 2013
- ARTERIS SAS
- PHILIPPE BOUCARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUITS WITH CACHE-COHERENCY
- Publication number 20130111149
- Publication date May 2, 2013
- Arteris SAS
- Laurent Rene Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Connectionless packet data transport over a connection-based point-...
- Publication number 20100020816
- Publication date Jan 28, 2010
- BROADCOM CORPORATION
- Manu Gulati
Information Patent Application
Hypertransport/SPI-4 Interface Supporting Configurable Deskewing
- Publication number 20090138749
- Publication date May 28, 2009
- BROADCOM CORPORATION
- Laurent R. Moll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER CONSERVATION VIA DRAM ACCESS
- Publication number 20090132764
- Publication date May 21, 2009
- MONTALVO SYSTEMS, INC.
- Laurent R. MOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hash and Route Hardware with Parallel Routing Scheme
- Publication number 20080198867
- Publication date Aug 21, 2008
- BROADCOM CORPORATION
- Laurent Moll
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Systems including packet interfaces, switches, and packet DMA circu...
- Publication number 20070291781
- Publication date Dec 20, 2007
- Broadcom Corporation, a California Corporation
- Barton J. Sano
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Systems using mix of packet, coherent, and noncoherent traffic to o...
- Publication number 20070214230
- Publication date Sep 13, 2007
- Broadcom Corporation, a California Corporation
- Barton J. Sano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER CONSERVATION VIA DRAM ACCESS REDUCTION
- Publication number 20070214323
- Publication date Sep 13, 2007
- MONTALVO SYSTEMS, INC.
- Laurent R. MOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Receiving data from virtual channels
- Publication number 20070189299
- Publication date Aug 16, 2007
- Broadcom Corporation, a California Corporation
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SMALL AND POWER-EFFICIENT CACHE THAT CAN PROVIDE DATA FOR BACKGROUN...
- Publication number 20070186057
- Publication date Aug 9, 2007
- MONTALVO SYSTEMS, INC.
- Laurent R. MOLL
- G06 - COMPUTING CALCULATING COUNTING

LAURENT MOLL

Person

Patents Grantslast 30 patents

System and memory with configurable error-correction code (ECC) dat...

Dram-aware caching

Memory with system ECC

Memory with dynamic voltage scaling

STLB prefetching for a multi-dimension engine

Hybrid cache comprising coherent and non-coherent lines

System and method for a shared cache with adaptive partitioning

Coherency controller with reduced data buffer

Adaptive tuning of snoops

DMA engine with STLB prefetch capabilities and tethered prefetching

System translation look-aside buffer integrated in an interconnect

Simplified controller with partial coherency

System translation look-aside buffer with request-based allocation...

Training, power-gating, and dynamic frequency changing of a memory...

Method and system for advance wakeup from low-power sleep states

Method and apparatus for supporting target-side security in a cache...

Transport of PCI-ordered traffic over independent networks

Virtual core management

Connectionless packet data transport over a connection-based point-...

Hypertransport/SPI-4 interface supporting configurable deskewing

Small and power-efficient cache that can provide data for backgroun...

Re-fetching cache memory enabling alternative operational modes

Power conservation via DRAM access reduction

Power conservation via DRAM access

Re-fetching cache memory having coherent re-fetching

Virtual core management

Virtual core management

System and method for conserving power

Systems including packet interfaces, switches, and packet DMA circu...

Reduced-power memory with per-sector power/ground control and early...

Patents Applicationslast 30 patents

SYSTEM AND MEMORY WITH CONFIGURABLE ERROR-CORRECTION CODE (ECC) DAT...

DRAM-AWARE CACHING

SYSTEM AND MEMORY WITH CONFIGURABLE ERROR-CORRECTION CODE (ECC) DAT...

MEMORY WITH SYSTEM ECC

MEMORY WITH DYNAMIC VOLTAGE SCALING

SYSTEM AND METHOD FOR A SHARED CACHE WITH ADAPTIVE PARTITIONING

HYBRID CACHE COMPRISING COHERENT AND NON-COHERENT LINES

METHOD AND APPARATUS FOR SUPPORTING TARGET-SIDE SECURITY IN A CACHE...

SIMPLIFIED CONTROLLER WITH PARTIAL COHERENCY

ADAPTIVE TUNING OF SNOOPS

COHERENCY CONTROLLER WITH REDUCED DATA BUFFER

ADAPTIVE TUNING OF SNOOPS

METHOD AND SYSTEM FOR IMPLEMENTING A CONTROL REGISTER ACCESS BUS

SYSTEM TRANSLATION LOOK-ASIDE BUFFER INTEGRATED IN AN INTERCONNECT

SYSTEM TRANSLATION LOOK-ASIDE BUFFER WITH REQUEST-BASED ALLOCATION...

DMA ENGINE WITH STLB PREFETCH CAPABILITIES AND TETHERED PREFETCHING

STLB PREFETCHING FOR A MULTI-DIMENSION ENGINE

TRAINING, POWER-GATING, AND DYNAMIC FREQUENCY CHANGING OF A MEMORY...

METHOD AND SYSTEM FOR ADVANCE WAKEUP FROM LOW-POWER SLEEP STATES

TRANSPORT OF PCI-ORDERED TRAFFIC OVER INDEPENDENT NETWORKS

INTEGRATED CIRCUITS WITH CACHE-COHERENCY

Connectionless packet data transport over a connection-based point-...

Hypertransport/SPI-4 Interface Supporting Configurable Deskewing

POWER CONSERVATION VIA DRAM ACCESS

Hash and Route Hardware with Parallel Routing Scheme

Systems including packet interfaces, switches, and packet DMA circu...

Systems using mix of packet, coherent, and noncoherent traffic to o...

POWER CONSERVATION VIA DRAM ACCESS REDUCTION

Receiving data from virtual channels

SMALL AND POWER-EFFICIENT CACHE THAT CAN PROVIDE DATA FOR BACKGROUN...