Le Zheng

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Performing complex multiply-accumulate operations
- Patent number 11,507,761
- Issue date Nov 22, 2022
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memristor spiking architecture
- Patent number 11,232,352
- Issue date Jan 25, 2022
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memristive bit cell with switch regulating components
- Patent number 11,158,370
- Issue date Oct 26, 2021
- Hewlett Packard Enterprise Development LP
- Emmanuelle J. Merced Grafals
- G11 - INFORMATION STORAGE
Information Patent Grant
Memristive array with parallel reset control devices
- Patent number 10,770,140
- Issue date Sep 8, 2020
- Hewlett Packard Enterprise Development LP
- John Paul Strachan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memristive arrays with offset elements
- Patent number 10,706,922
- Issue date Jul 7, 2020
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Finite state machines
- Patent number 10,620,605
- Issue date Apr 14, 2020
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memristive arrays with a waveform generation device
- Patent number 10,593,403
- Issue date Mar 17, 2020
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memristive control circuits with current control components
- Patent number 10,424,378
- Issue date Sep 24, 2019
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G11 - INFORMATION STORAGE
Information Patent Grant
TCAM-driven RRAM
- Patent number 10,418,103
- Issue date Sep 17, 2019
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Hardware accelerators for calculating node values of neural networks
- Patent number 10,332,592
- Issue date Jun 25, 2019
- Hewlett Packard Enterprise Development LP
- John Paul Strachan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Finite state machines
- Patent number 10,261,487
- Issue date Apr 16, 2019
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Comparator associated with dictionary entry
- Patent number 10,216,720
- Issue date Feb 26, 2019
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiply-accumulate circuits
- Patent number 10,180,820
- Issue date Jan 15, 2019
- HEWLETT PACKARD ENTERPRlSE DEVELOPMENT LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neuron circuits
- Patent number 10,089,574
- Issue date Oct 2, 2018
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjusting target values of resistive memory devices
- Patent number 10,037,804
- Issue date Jul 31, 2018
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiply-accumulate with voltage tracking modulation
- Patent number 10,007,517
- Issue date Jun 26, 2018
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundant column or row in resistive random access memory
- Patent number 9,953,728
- Issue date Apr 24, 2018
- Hewlett Packard Enterprise Development LP
- Emmanuelle J Merced Grafals
- G11 - INFORMATION STORAGE
Information Patent Grant
Ternary content addressable memories having a bit cell with memrist...
- Patent number 9,934,857
- Issue date Apr 3, 2018
- Hewlett Packard Enterprise Development LP
- Le Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Arrays of bit-cells
- Patent number 9,928,904
- Issue date Mar 27, 2018
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Ternary content addressable memories
- Patent number 9,847,132
- Issue date Dec 19, 2017
- Hewlett Packard Enterprise Development LP
- Le Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memories
- Patent number 9,721,661
- Issue date Aug 1, 2017
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of operating and apparatus of memristor arrays with diagonal...
- Patent number 9,691,479
- Issue date Jun 27, 2017
- Hewlett Packard Enterprise Development LP
- Emmanuelle J. Merced Grafals
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory with banks
- Patent number 9,691,483
- Issue date Jun 27, 2017
- Hewlett Packard Enterprise Development LP
- Brent Buchanan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMRISTIVE BIT CELL WITH SWITCH REGULATING COMPONENTS
- Publication number 20210193222
- Publication date Jun 24, 2021
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Emmanuelle J. Merced Grafals
- G11 - INFORMATION STORAGE
Information Patent Application
PERFORMING COMPLEX MULTIPLY-ACCUMULATE OPERATIONS
- Publication number 20200167530
- Publication date May 28, 2020
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memristor Spiking Architecture
- Publication number 20200026995
- Publication date Jan 23, 2020
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FINITE STATE MACHINES
- Publication number 20190235458
- Publication date Aug 1, 2019
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Brent Buchanan
- G05 - CONTROLLING REGULATING
Information Patent Application
Multiply-Acumulate Circuits
- Publication number 20190114141
- Publication date Apr 18, 2019
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMRISTIVE CONTROL CIRCUITS WITH CURRENT CONTROL COMPONENTS
- Publication number 20190043573
- Publication date Feb 7, 2019
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Brent Buchanan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMRISTIVE ARRAYS WITH A WAVEFORM GENERATION DEVICE
- Publication number 20190043577
- Publication date Feb 7, 2019
- Brent Buchanan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMRISTIVE ARRAY WITH PARALLEL RESET CONTROL DEVICES
- Publication number 20190027217
- Publication date Jan 24, 2019
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- John Paul Strachan
- G11 - INFORMATION STORAGE
Information Patent Application
ADJUSTING TARGET VALUES OF RESISTIVE MEMORY DEVICES
- Publication number 20180218771
- Publication date Aug 2, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPARATOR ASSOCIATED WITH DICTIONARY ENTRY
- Publication number 20180121416
- Publication date May 3, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE ACCELERATORS FOR CALCULATING NODE VALUES OF NEURAL NETWORKS
- Publication number 20180114569
- Publication date Apr 26, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- John Paul Strachan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiply-Accumulate Circuits
- Publication number 20180095722
- Publication date Apr 5, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Brent Buchanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLY-ACCUMULATE WITH VOLTAGE TRACKING MODULATION
- Publication number 20180095748
- Publication date Apr 5, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Brent BUCHANAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURON CIRCUITS
- Publication number 20180075337
- Publication date Mar 15, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- BRENT BUCHANAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TERNARY CONTENT ADDRESSABLE MEMORIES HAVING A BIT CELL WITH MEMRIST...
- Publication number 20180040374
- Publication date Feb 8, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Le Zheng
- G11 - INFORMATION STORAGE
Information Patent Application
REDUNDANT COLUMN OR ROW IN RESISTIVE RANDOM ACCESS MEMORY
- Publication number 20180025790
- Publication date Jan 25, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Emmanuelle J. Merced Grafals
- G11 - INFORMATION STORAGE
Information Patent Application
ARRAYS OF BIT-CELLS
- Publication number 20170249986
- Publication date Aug 31, 2017
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Brent BUCHANAN
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Performing complex multiply-accumulate operations

Memristor spiking architecture

Memristive bit cell with switch regulating components

Memristive array with parallel reset control devices

Memristive arrays with offset elements

Finite state machines

Memristive arrays with a waveform generation device

Memristive control circuits with current control components

TCAM-driven RRAM

Hardware accelerators for calculating node values of neural networks

Finite state machines

Comparator associated with dictionary entry

Multiply-accumulate circuits

Neuron circuits

Adjusting target values of resistive memory devices

Multiply-accumulate with voltage tracking modulation

Redundant column or row in resistive random access memory

Ternary content addressable memories having a bit cell with memrist...

Arrays of bit-cells

Ternary content addressable memories

Content addressable memories

Method of operating and apparatus of memristor arrays with diagonal...

Content addressable memory with banks

Patents Applicationslast 30 patents

MEMRISTIVE BIT CELL WITH SWITCH REGULATING COMPONENTS

PERFORMING COMPLEX MULTIPLY-ACCUMULATE OPERATIONS

Memristor Spiking Architecture

FINITE STATE MACHINES

Multiply-Acumulate Circuits

MEMRISTIVE CONTROL CIRCUITS WITH CURRENT CONTROL COMPONENTS

MEMRISTIVE ARRAYS WITH A WAVEFORM GENERATION DEVICE

MEMRISTIVE ARRAY WITH PARALLEL RESET CONTROL DEVICES

ADJUSTING TARGET VALUES OF RESISTIVE MEMORY DEVICES

COMPARATOR ASSOCIATED WITH DICTIONARY ENTRY

HARDWARE ACCELERATORS FOR CALCULATING NODE VALUES OF NEURAL NETWORKS

Multiply-Accumulate Circuits

MULTIPLY-ACCUMULATE WITH VOLTAGE TRACKING MODULATION

NEURON CIRCUITS

TERNARY CONTENT ADDRESSABLE MEMORIES HAVING A BIT CELL WITH MEMRIST...

REDUNDANT COLUMN OR ROW IN RESISTIVE RANDOM ACCESS MEMORY

ARRAYS OF BIT-CELLS