Lee Ward Collins

Person

Cary, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-chip package with interconnected stacked chips
- Patent number 8,138,610
- Issue date Mar 20, 2012
- Qimonda AG
- Jong Hoon Oh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory refresh system and method
- Patent number 7,975,170
- Issue date Jul 5, 2011
- Qimonda AG
- Klaus Hummler
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and structure of expanding, upgrading, or fixing multi-chip...
- Patent number 7,944,047
- Issue date May 17, 2011
- Qimonda AG
- Jong Hoon Oh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for synchronizing memory enabled systems with...
- Patent number 7,882,324
- Issue date Feb 1, 2011
- Qimonda AG
- Josef Schnell
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for implementing memory enabled systems using...
- Patent number 7,721,010
- Issue date May 18, 2010
- Qimonda North America Corp.
- Josef Schnell
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-diagnostic scheme for detecting errors
- Patent number 7,694,196
- Issue date Apr 6, 2010
- Qimonda North America Corp.
- Josef Schnell
- G11 - INFORMATION STORAGE
Information Patent Grant
Structure to share internally generated voltages between chips in MCP
- Patent number 7,688,665
- Issue date Mar 30, 2010
- Qimonda North America Corp.
- Jung Pill Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory configured on a common substrate
- Patent number 7,539,034
- Issue date May 26, 2009
- Qimonda North America Corp.
- Jung Pill Kim
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR STACKING CHIPS IN A MULTI-CHIP PACKAGE
- Publication number 20090200652
- Publication date Aug 13, 2009
- Jong Hoon Oh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-DIAGNOSTIC SCHEME FOR DETECTING ERRORS
- Publication number 20090129186
- Publication date May 21, 2009
- Josef Schnell
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR SYNCHRONIZING MEMORY ENABLED SYSTEMS WITH...
- Publication number 20090113158
- Publication date Apr 30, 2009
- JOSEF SCHNELL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR IMPLEMENTING MEMORY ENABLED SYSTEMS USING...
- Publication number 20090113078
- Publication date Apr 30, 2009
- JOSEF SCHNELL
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND STRUCTURE OF EXPANDING, UPGRADING, OR FIXING MULTI-CHIP...
- Publication number 20090079055
- Publication date Mar 26, 2009
- JONG HOON OH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE TO SHARE INTERNALLY GENERATED VOLTAGES BETWEEN CHIPS IN MCP
- Publication number 20090080279
- Publication date Mar 26, 2009
- Jung Pill Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY REFRESH SYSTEM AND METHOD
- Publication number 20080313494
- Publication date Dec 18, 2008
- QIMONDA NORTH AMERICA CORP.
- Klaus Hummler
- G11 - INFORMATION STORAGE
Information Patent Application
Memory configured on a common substrate
- Publication number 20080189480
- Publication date Aug 7, 2008
- Jung Pill Kim
- G11 - INFORMATION STORAGE

Lee Ward Collins

Person

Patents Grantslast 30 patents

Multi-chip package with interconnected stacked chips

Memory refresh system and method

Method and structure of expanding, upgrading, or fixing multi-chip...

Method and apparatus for synchronizing memory enabled systems with...

Method and apparatus for implementing memory enabled systems using...

Self-diagnostic scheme for detecting errors

Structure to share internally generated voltages between chips in MCP

Memory configured on a common substrate

Patents Applicationslast 30 patents

METHOD FOR STACKING CHIPS IN A MULTI-CHIP PACKAGE

SELF-DIAGNOSTIC SCHEME FOR DETECTING ERRORS

METHOD AND APPARATUS FOR SYNCHRONIZING MEMORY ENABLED SYSTEMS WITH...

METHOD AND APPARATUS FOR IMPLEMENTING MEMORY ENABLED SYSTEMS USING...

METHOD AND STRUCTURE OF EXPANDING, UPGRADING, OR FIXING MULTI-CHIP...

STRUCTURE TO SHARE INTERNALLY GENERATED VOLTAGES BETWEEN CHIPS IN MCP

MEMORY REFRESH SYSTEM AND METHOD

Memory configured on a common substrate