Lei Luo

Person

Durham, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Quad-data-rate (QDR) host interface in a memory system
- Patent number 12,164,808
- Issue date Dec 10, 2024
- RAMBUS INC.
- Lei Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal skew in source-synchronous system
- Patent number 12,027,197
- Issue date Jul 2, 2024
- RAMBUS INC.
- Shahram Nikoukary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Command-triggered data clock distribution mode
- Patent number 11,955,161
- Issue date Apr 9, 2024
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Command-triggered data clock distribution
- Patent number 11,587,605
- Issue date Feb 21, 2023
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory components and controllers that calibrate multiphase synchro...
- Patent number 11,289,139
- Issue date Mar 29, 2022
- RAMBUS INC.
- Thomas Giovannini
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory component with command-triggered data clock distribution
- Patent number 11,049,546
- Issue date Jun 29, 2021
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for source-synchronous signaling
- Patent number 10,840,920
- Issue date Nov 17, 2020
- RAMBUS INC.
- Jared L. Zerbe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory component with independently enabled data and command interf...
- Patent number 10,665,289
- Issue date May 26, 2020
- Rambus Inc.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory components and controllers that calibrate multiphase synchro...
- Patent number 10,607,670
- Issue date Mar 31, 2020
- Rambus Inc.
- Thomas Giovannini
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for source-synchronous signaling
- Patent number 10,541,693
- Issue date Jan 21, 2020
- Rambus Inc.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Changing settings for a transient period associated with a determin...
- Patent number 10,268,252
- Issue date Apr 23, 2019
- Rambus Inc.
- Yu Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with phase adjusted clock for performing memory o...
- Patent number 10,249,353
- Issue date Apr 2, 2019
- Rambus Inc.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for source-synchronous signaling
- Patent number 10,211,841
- Issue date Feb 19, 2019
- Rambus Inc.
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
On-chip regulator with variable load compensation
- Patent number 10,067,519
- Issue date Sep 4, 2018
- Rambus Inc.
- Brian S. Leibowitz
- G11 - INFORMATION STORAGE
Information Patent Grant
Staggered exit from memory power-down
- Patent number 10,026,466
- Issue date Jul 17, 2018
- Rambus Inc.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Grant
Changing settings for a transient period associated with a determin...
- Patent number 9,870,040
- Issue date Jan 16, 2018
- Rambus Inc.
- Yu Chang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory components and controllers that calibrate multiphase synchro...
- Patent number 9,824,730
- Issue date Nov 21, 2017
- Rambus Inc.
- Thomas Giovannini
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for source-synchronous signaling
- Patent number 9,748,960
- Issue date Aug 29, 2017
- Rambus Inc.
- Jared L. Zerbe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory component with staggered power-down exit
- Patent number 9,704,560
- Issue date Jul 11, 2017
- Rambus Inc.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller with phase adjusted clock for performing memory o...
- Patent number 9,691,454
- Issue date Jun 27, 2017
- Rambus Inc.
- Ian P. Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Grant
On-chip regulator with variable load compensation
- Patent number 9,684,321
- Issue date Jun 20, 2017
- Rambus Inc.
- Brian S. Leibowitz
- G05 - CONTROLLING REGULATING
Information Patent Grant
Reference voltage generation and calibration for single-ended signa...
- Patent number 9,564,879
- Issue date Feb 7, 2017
- Rambus Inc.
- Lei Luo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power-management for integrated circuits
- Patent number 9,430,027
- Issue date Aug 30, 2016
- Rambus Inc.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory components and controllers that calibrate multiphase synchro...
- Patent number 9,412,428
- Issue date Aug 9, 2016
- Rambus Inc.
- Thomas Giovannini
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller with phase adjusted clock for performing memory o...
- Patent number 9,378,786
- Issue date Jun 28, 2016
- Rambus Inc.
- Ian P. Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit device having programmable input capacitance
- Patent number 9,373,384
- Issue date Jun 21, 2016
- Rambus Inc.
- Ravindranath Kollipara
- G11 - INFORMATION STORAGE
Information Patent Grant
Changing settings for a transient period associated with a determin...
- Patent number 9,304,568
- Issue date Apr 5, 2016
- Rambus Inc.
- Yu Chang
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Equalizer-compensated AC-coupled termination
- Patent number 9,294,317
- Issue date Mar 22, 2016
- Rambus Inc.
- John Wilson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Capacitive-coupled crosstalk cancellation
- Patent number 9,166,650
- Issue date Oct 20, 2015
- Rambus Inc.
- John Michael Wilson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reference voltage generation and calibration for single-ended signa...
- Patent number 9,166,838
- Issue date Oct 20, 2015
- Rambus Inc.
- Lei Luo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SIGNAL SKEW IN SOURCE-SYNCHRONOUS SYSTEM
- Publication number 20240395310
- Publication date Nov 28, 2024
- Rambus Inc.
- Shahram NIKOUKARY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT
- Publication number 20240282357
- Publication date Aug 22, 2024
- Rambus Inc.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUITS AND METHODS FOR SELF-ADAPTIVE DECISION-FEEDBACK EQUALIZATI...
- Publication number 20240168873
- Publication date May 23, 2024
- Rambus Inc.
- Andrew M. Fuller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT
- Publication number 20230326513
- Publication date Oct 12, 2023
- Rambus Inc.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUAD-DATA-RATE (QDR) HOST INTERFACE IN A MEMORY SYSTEM
- Publication number 20230112159
- Publication date Apr 13, 2023
- Rambus Inc.
- Lei Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL SKEW IN SOURCE-SYNCHRONOUS SYSTEM
- Publication number 20220059154
- Publication date Feb 24, 2022
- Rambus Inc.
- Shahram NIKOUKARY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT
- Publication number 20210358535
- Publication date Nov 18, 2021
- Rambus Inc.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT
- Publication number 20200349997
- Publication date Nov 5, 2020
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENTS AND CONTROLLERS THAT CALIBRATE MULTIPHASE SYNCHRO...
- Publication number 20200258557
- Publication date Aug 13, 2020
- RAMBUS INC.
- Thomas GIOVANNINI
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR SOURCE-SYNCHRONOUS SIGNALING
- Publication number 20200212917
- Publication date Jul 2, 2020
- RAMBUS INC.
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR SOURCE-SYNCHRONOUS SIGNALING
- Publication number 20190238142
- Publication date Aug 1, 2019
- RAMBUS INC.
- Jared L. Zerbe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT
- Publication number 20190043551
- Publication date Feb 7, 2019
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHANGING SETTINGS FOR A TRANSIENT PERIOD ASSOCIATED WITH A DETERMIN...
- Publication number 20180196489
- Publication date Jul 12, 2018
- RAMBUS INC.
- Yu Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENTS AND CONTROLLERS THAT CALIBRATE MULTIPHASE SYNCHRO...
- Publication number 20180137902
- Publication date May 17, 2018
- RAMBUS INC.
- Thomas Giovannini
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR SOURCE-SYNCHRONOUS SIGNALING
- Publication number 20180083642
- Publication date Mar 22, 2018
- RAMBUS INC.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Application
STAGGERED EXIT FROM MEMORY POWER-DOWN
- Publication number 20170372768
- Publication date Dec 28, 2017
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-CHIP REGULATOR WITH VARIABLE LOAD COMPENSATION
- Publication number 20170351282
- Publication date Dec 7, 2017
- RAMBUS INC.
- Brian S. Leibowitz
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER WITH PHASE ADJUSTED CLOCK FOR PERFORMING MEMORY O...
- Publication number 20170323672
- Publication date Nov 9, 2017
- RAMBUS INC.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Component with staggered power-down exit
- Publication number 20170047108
- Publication date Feb 16, 2017
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER WITH PHASE ADJUSTED CLOCK FOR PERFORMING MEMORY O...
- Publication number 20160343417
- Publication date Nov 24, 2016
- RAMBUS INC.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENTS AND CONTROLLERS THAT CALIBRATE MULTIPHASE SYNCHRO...
- Publication number 20160343418
- Publication date Nov 24, 2016
- RAMBUS INC.
- Thomas Giovannini
- G11 - INFORMATION STORAGE
Information Patent Application
CHANGING SETTINGS FOR A TRANSIENT PERIOD ASSOCIATED WITH A DETERMIN...
- Publication number 20160209902
- Publication date Jul 21, 2016
- RAMBUS INC.
- Yu Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER-MANAGEMENT FOR INTEGRATED CIRCUITS
- Publication number 20150348612
- Publication date Dec 3, 2015
- RAMBUS INC.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Application
ON-CHIP REGULATOR WITH VARIABLE LOAD COMPENSATION
- Publication number 20150309517
- Publication date Oct 29, 2015
- RAMBUS INC.
- Brian S. Leibowitz
- G05 - CONTROLLING REGULATING
Information Patent Application
METHOD AND APPARATUS FOR SOURCE-SYNCHRONOUS SIGNALING
- Publication number 20140347108
- Publication date Nov 27, 2014
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT AND METHOD FOR ITS OPERATION
- Publication number 20140281205
- Publication date Sep 18, 2014
- Rambus, Inc.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHANGING SETTINGS FOR A TRANSIENT PERIOD ASSOCIATED WITH A DETERMIN...
- Publication number 20140258768
- Publication date Sep 11, 2014
- Yu Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-CHIP REGULATOR WITH VARIABLE LOAD COMPENSATION
- Publication number 20140210545
- Publication date Jul 31, 2014
- Brian S. Leibowitz
- G11 - INFORMATION STORAGE
Information Patent Application
Methods and Systems for Self-Referencing Single-Ended Signals
- Publication number 20140036977
- Publication date Feb 6, 2014
- Michael Bucher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MEMORY COMPONENTS AND CONTROLLERS THAT CALIBRATE MULTIPHASE SYNCHRO...
- Publication number 20130346721
- Publication date Dec 26, 2013
- RAMBUS INC.
- Thomas Giovannini
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Quad-data-rate (QDR) host interface in a memory system

Signal skew in source-synchronous system

Command-triggered data clock distribution mode

Command-triggered data clock distribution

Memory components and controllers that calibrate multiphase synchro...

Memory component with command-triggered data clock distribution

Method and apparatus for source-synchronous signaling

Memory component with independently enabled data and command interf...

Memory components and controllers that calibrate multiphase synchro...

Method and apparatus for source-synchronous signaling

Changing settings for a transient period associated with a determin...

Memory controller with phase adjusted clock for performing memory o...

Method and apparatus for source-synchronous signaling

On-chip regulator with variable load compensation

Staggered exit from memory power-down

Changing settings for a transient period associated with a determin...

Memory components and controllers that calibrate multiphase synchro...

Method and apparatus for source-synchronous signaling

Memory component with staggered power-down exit

Memory controller with phase adjusted clock for performing memory o...

On-chip regulator with variable load compensation

Reference voltage generation and calibration for single-ended signa...

Power-management for integrated circuits

Memory components and controllers that calibrate multiphase synchro...

Memory controller with phase adjusted clock for performing memory o...

Integrated circuit device having programmable input capacitance

Changing settings for a transient period associated with a determin...

Equalizer-compensated AC-coupled termination

Capacitive-coupled crosstalk cancellation

Reference voltage generation and calibration for single-ended signa...

Patents Applicationslast 30 patents

SIGNAL SKEW IN SOURCE-SYNCHRONOUS SYSTEM

MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT

CIRCUITS AND METHODS FOR SELF-ADAPTIVE DECISION-FEEDBACK EQUALIZATI...

MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT

QUAD-DATA-RATE (QDR) HOST INTERFACE IN A MEMORY SYSTEM

SIGNAL SKEW IN SOURCE-SYNCHRONOUS SYSTEM

MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT

MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT

MEMORY COMPONENTS AND CONTROLLERS THAT CALIBRATE MULTIPHASE SYNCHRO...

METHOD AND APPARATUS FOR SOURCE-SYNCHRONOUS SIGNALING

METHOD AND APPARATUS FOR SOURCE-SYNCHRONOUS SIGNALING

MEMORY COMPONENT WITH STAGGERED POWER-DOWN EXIT

CHANGING SETTINGS FOR A TRANSIENT PERIOD ASSOCIATED WITH A DETERMIN...

MEMORY COMPONENTS AND CONTROLLERS THAT CALIBRATE MULTIPHASE SYNCHRO...

METHOD AND APPARATUS FOR SOURCE-SYNCHRONOUS SIGNALING

STAGGERED EXIT FROM MEMORY POWER-DOWN

ON-CHIP REGULATOR WITH VARIABLE LOAD COMPENSATION

MEMORY CONTROLLER WITH PHASE ADJUSTED CLOCK FOR PERFORMING MEMORY O...

Memory Component with staggered power-down exit

MEMORY CONTROLLER WITH PHASE ADJUSTED CLOCK FOR PERFORMING MEMORY O...

MEMORY COMPONENTS AND CONTROLLERS THAT CALIBRATE MULTIPHASE SYNCHRO...

CHANGING SETTINGS FOR A TRANSIENT PERIOD ASSOCIATED WITH A DETERMIN...

POWER-MANAGEMENT FOR INTEGRATED CIRCUITS

ON-CHIP REGULATOR WITH VARIABLE LOAD COMPENSATION

METHOD AND APPARATUS FOR SOURCE-SYNCHRONOUS SIGNALING

MEMORY CIRCUIT AND METHOD FOR ITS OPERATION

CHANGING SETTINGS FOR A TRANSIENT PERIOD ASSOCIATED WITH A DETERMIN...

ON-CHIP REGULATOR WITH VARIABLE LOAD COMPENSATION

Methods and Systems for Self-Referencing Single-Ended Signals

MEMORY COMPONENTS AND CONTROLLERS THAT CALIBRATE MULTIPHASE SYNCHRO...