Leonard L. Mora

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Wire bond integrated circuit package for high speed I/O
- Patent number 7,804,167
- Issue date Sep 28, 2010
- LSI Logic Corporation
- Clifford Fishley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ball grid array package layout supporting many voltage splits and f...
- Patent number 7,750,460
- Issue date Jul 6, 2010
- LSI Corporation
- Clifford R. Fishley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package substrate with high density routing mech...
- Patent number 6,891,260
- Issue date May 10, 2005
- LSI Logic Corporation
- Leonard L. Mora
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package substrate with multiple voltage supplies
- Patent number 6,777,802
- Issue date Aug 17, 2004
- LSI Logic Corporation
- Leonard L. Mora
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Active trace rerouting
- Patent number 6,748,576
- Issue date Jun 8, 2004
- LSI Logic Corporation
- Leonard L. Mora
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact escape pattern
- Patent number 6,479,319
- Issue date Nov 12, 2002
- LSI Logic Corporation
- Leonard L. Mora
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reinforced sealing technique for an integrated circuit package
- Patent number 6,264,778
- Issue date Jul 24, 2001
- Philips Electronics North America Corporation
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of assembling and cooling a package structure with accessibl...
- Patent number 5,687,474
- Issue date Nov 18, 1997
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reinforced sealing technique for an integrated-circuit package
- Patent number 5,539,151
- Issue date Jul 23, 1996
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure having accessible chip
- Patent number 5,491,362
- Issue date Feb 13, 1996
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
BALL GRID ARRAY PACKAGE LAYOUT SUPPORTING MANY VOLTAGE SPLITS AND F...
- Publication number 20090212413
- Publication date Aug 27, 2009
- Clifford R. Fishley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRE BOND INTEGRATED CIRCUIT PACKAGE FOR HIGH SPEED I/O
- Publication number 20080128919
- Publication date Jun 5, 2008
- Clifford Fishley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Active trace rerouting
- Publication number 20030221178
- Publication date Nov 27, 2003
- Leonard L. Mora
- H01 - BASIC ELECTRIC ELEMENTS

Leonard L. Mora

Person

Patents Grantslast 30 patents

Wire bond integrated circuit package for high speed I/O

Ball grid array package layout supporting many voltage splits and f...

Integrated circuit package substrate with high density routing mech...

Integrated circuit package substrate with multiple voltage supplies

Active trace rerouting

Contact escape pattern

Reinforced sealing technique for an integrated circuit package

Method of assembling and cooling a package structure with accessibl...

Reinforced sealing technique for an integrated-circuit package

Package structure having accessible chip

Patents Applicationslast 30 patents

BALL GRID ARRAY PACKAGE LAYOUT SUPPORTING MANY VOLTAGE SPLITS AND F...

WIRE BOND INTEGRATED CIRCUIT PACKAGE FOR HIGH SPEED I/O

Active trace rerouting