Li-Ling Ma

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and system for parallel processing of IC design layouts
- Patent number 8,448,096
- Issue date May 21, 2013
- Cadence Design Systems, Inc.
- Xiaojun Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for parallel processing of IC design layouts
- Patent number 7,657,856
- Issue date Feb 2, 2010
- Cadence Design Systems, Inc.
- Mathew Koshy
- G06 - COMPUTING CALCULATING COUNTING