Liang Choo Hsia

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Slot designs in wide metal lines
- Patent number 9,318,378
- Issue date Apr 19, 2016
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable interconnect for semiconductor device
- Patent number 9,054,107
- Issue date Jun 9, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Fan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus to reduce thermal variations within an integra...
- Patent number 8,860,142
- Issue date Oct 14, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Debora Chyiu Hyia Poon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained channel transistor structure and method
- Patent number 8,754,447
- Issue date Jun 17, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Jin Ping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a semiconductor device having an epitaxial c...
- Patent number 8,716,076
- Issue date May 6, 2014
- GlobalFoundries Singapore Pte. Ltd.
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dielectric stack
- Patent number 8,664,711
- Issue date Mar 4, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Sung Mun Jung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Spacer-less low-K dielectric processes
- Patent number 8,624,329
- Issue date Jan 7, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable interconnect for semiconductor device
- Patent number 8,598,031
- Issue date Dec 3, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Fan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Statistical optical proximity correction
- Patent number 8,572,524
- Issue date Oct 29, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Wenzhan Zhou
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Integrated circuit and method of fabrication thereof
- Patent number 8,546,873
- Issue date Oct 1, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dielectric stack
- Patent number 8,541,273
- Issue date Sep 24, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Sung Mun Jung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit system with through silicon via and method of ma...
- Patent number 8,536,705
- Issue date Sep 17, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Pradeep Ramachandramurthy Yelehanka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for introducing physical damage into an integrate...
- Patent number 8,489,945
- Issue date Jul 16, 2013
- GLOBALFOUNDRIES Singapore Pte, Ltd.
- Zhihong Mai
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit system with via and method of manufacture thereof
- Patent number 8,405,222
- Issue date Mar 26, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming high-k dielectric stop layer for contact hole ope...
- Patent number 8,354,347
- Issue date Jan 15, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Jianhui Ye
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Defect monitoring in semiconductor device fabrication
- Patent number 8,339,449
- Issue date Dec 25, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Barbara Fong Chin Lim
- G01 - MEASURING TESTING
Information Patent Grant
Critical dimension for trench and vias
- Patent number 8,293,545
- Issue date Oct 23, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Hai Cong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus to reduce thermal variations within an integra...
- Patent number 8,293,544
- Issue date Oct 23, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Debora Chyiu Hyia Poon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Defect detection recipe definition
- Patent number 8,289,508
- Issue date Oct 16, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Victor Seng Keong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit system with through silicon via and method of ma...
- Patent number 8,236,688
- Issue date Aug 7, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Pradeep Ramachandramurthy Yelehanka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test chiplets for devices
- Patent number 8,178,368
- Issue date May 15, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Victor Seng Keong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming shallow trench isolation structures for integrate...
- Patent number 8,178,417
- Issue date May 15, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Shailendra Mishra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and methods for cleaning and drying of wafers
- Patent number 8,177,993
- Issue date May 15, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Boon Meng Seah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit system employing backside energy source for elec...
- Patent number 8,158,513
- Issue date Apr 17, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Zhihong Mai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nested and isolated transistors with reduced impedance difference
- Patent number 8,143,651
- Issue date Mar 27, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Johnny Widodo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable interconnects
- Patent number 8,102,054
- Issue date Jan 24, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Bei Chao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit and method of fabrication thereof
- Patent number 8,058,123
- Issue date Nov 15, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mask and method to pattern chromeless phase lithography contact hole
- Patent number 8,057,968
- Issue date Nov 15, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Sia Kim Tan
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and apparatus for removing radiation side lobes
- Patent number 8,048,588
- Issue date Nov 1, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Sia Kim Tan
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for fabricating a semiconductor device having an epitaxial c...
- Patent number 8,012,839
- Issue date Sep 6, 2011
- Chartered Semiconductor Manufacturing, Ltd.
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SLOT DESIGNS IN WIDE METAL LINES
- Publication number 20160233157
- Publication date Aug 11, 2016
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Yeow Kheng LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE INTERCONNECT FOR SEMICONDUCTOR DEVICE
- Publication number 20140084486
- Publication date Mar 27, 2014
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Fan ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIELECTRIC STACK
- Publication number 20140001538
- Publication date Jan 2, 2014
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Sung Mun JUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS TO REDUCE THERMAL VARIATIONS WITHIN AN INTEGRA...
- Publication number 20130099321
- Publication date Apr 25, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Debora Chyiu Hyia Poon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHODS FOR CLEANING AND DRYING OF WAFERS
- Publication number 20120255586
- Publication date Oct 11, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Boon Meng SEAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...
- Publication number 20120205806
- Publication date Aug 16, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Pradeep Ramachandramurthy Yelehanka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and system for introducing physical damage into an integrate...
- Publication number 20120086468
- Publication date Apr 12, 2012
- Globalfoundries Singapore PTE, LTD.
- Zhihong Mai
- G01 - MEASURING TESTING
Information Patent Application
DIELECTRIC STACK
- Publication number 20120074537
- Publication date Mar 29, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Sung Mun JUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF FABRICATION THEREOF
- Publication number 20120012940
- Publication date Jan 19, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Jinping LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM WITH VIA AND METHOD OF MANUFACTURE THEREOF
- Publication number 20110316166
- Publication date Dec 29, 2011
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING AN EPITAXIAL C...
- Publication number 20110281410
- Publication date Nov 17, 2011
- Chartered Semiconductor Manufacturing Ltd.
- JINPING LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...
- Publication number 20110237072
- Publication date Sep 29, 2011
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Pradeep Ramachandramurthy Yelehanka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEST CHIPLETS FOR DEVICES
- Publication number 20110114949
- Publication date May 19, 2011
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Victor Seng Keong LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEFECT DETECTION RECIPE DEFINITION
- Publication number 20110116085
- Publication date May 19, 2011
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Victor Seng Keong LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE INTERCONNECT FOR SEMICONDUCTOR DEVICE
- Publication number 20110074039
- Publication date Mar 31, 2011
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Fan ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEFECT MONITORING IN SEMICONDUCTOR DEVICE FABRICATION
- Publication number 20110032348
- Publication date Feb 10, 2011
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Barbara Fong Chin LIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RELIABLE INTERCONNECTS
- Publication number 20100314774
- Publication date Dec 16, 2010
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Bei Chao ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAINED CHANNEL TRANSISTOR STRUCTURE AND METHOD
- Publication number 20100308374
- Publication date Dec 9, 2010
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Jin Ping LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NESTED AND ISOLATED TRANSISTORS WITH REDUCED IMPEDANCE DIFFERENCE
- Publication number 20100301424
- Publication date Dec 2, 2010
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Johnny WIDODO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...
- Publication number 20100297844
- Publication date Nov 25, 2010
- Chartered Semiconductor Manufacturing LTD.
- Pradeep Ramachandramurthy Yelehanka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR REDUCING SILICIDE DEFECTS IN INTEGRATED CIRCUITS
- Publication number 20100267236
- Publication date Oct 21, 2010
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Jianhui YE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MASK AND METHOD TO PATTERN CHROMELESS PHASE LITHOGRAPHY CONTACT HOLE
- Publication number 20100196805
- Publication date Aug 5, 2010
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Sia Kim TAN
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED LAYERS
- Publication number 20100109045
- Publication date May 6, 2010
- Chartered Semiconductor Manufacturing LTD.
- Jin Ping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM EMPLOYING BACKSIDE ENERGY SOURCE FOR ELEC...
- Publication number 20100087061
- Publication date Apr 8, 2010
- Chartered Semiconductor Manufacturing LTD.
- Zhihong Mai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Spacer-less Low-K Dielectric Processes
- Publication number 20100059831
- Publication date Mar 11, 2010
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE INTERCONNECTS
- Publication number 20100044869
- Publication date Feb 25, 2010
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Bei Chao ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus to reduce thermal variations within an integra...
- Publication number 20100019329
- Publication date Jan 28, 2010
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Debora Chyiu Hyia Poon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM EMPLOYING SINGLE MASK LAYER TECHNIQUE FOR...
- Publication number 20100009527
- Publication date Jan 14, 2010
- Chartered Semiconductor Manufacturing LTD.
- Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Implantation for shallow trench isolation (STI) formation and for s...
- Publication number 20090315115
- Publication date Dec 24, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Beichao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR REDUCING SILICIDE DEFECTS IN INTEGRATED CIRCUITS
- Publication number 20090289309
- Publication date Nov 26, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Jianhui YE
- H01 - BASIC ELECTRIC ELEMENTS

Liang Choo Hsia

Person

Patents Grantslast 30 patents

Slot designs in wide metal lines

Reliable interconnect for semiconductor device

Method and apparatus to reduce thermal variations within an integra...

Strained channel transistor structure and method

Method for fabricating a semiconductor device having an epitaxial c...

Dielectric stack

Spacer-less low-K dielectric processes

Reliable interconnect for semiconductor device

Statistical optical proximity correction

Integrated circuit and method of fabrication thereof

Dielectric stack

Integrated circuit system with through silicon via and method of ma...

Method and system for introducing physical damage into an integrate...

Integrated circuit system with via and method of manufacture thereof

Method of forming high-k dielectric stop layer for contact hole ope...

Defect monitoring in semiconductor device fabrication

Critical dimension for trench and vias

Method and apparatus to reduce thermal variations within an integra...

Defect detection recipe definition

Integrated circuit system with through silicon via and method of ma...

Test chiplets for devices

Method of forming shallow trench isolation structures for integrate...

Apparatus and methods for cleaning and drying of wafers

Integrated circuit system employing backside energy source for elec...

Nested and isolated transistors with reduced impedance difference

Reliable interconnects

Integrated circuit and method of fabrication thereof

Mask and method to pattern chromeless phase lithography contact hole

Method and apparatus for removing radiation side lobes

Method for fabricating a semiconductor device having an epitaxial c...

Patents Applicationslast 30 patents

SLOT DESIGNS IN WIDE METAL LINES

RELIABLE INTERCONNECT FOR SEMICONDUCTOR DEVICE

DIELECTRIC STACK

METHOD AND APPARATUS TO REDUCE THERMAL VARIATIONS WITHIN AN INTEGRA...

APPARATUS AND METHODS FOR CLEANING AND DRYING OF WAFERS

INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...

Method and system for introducing physical damage into an integrate...

DIELECTRIC STACK

INTEGRATED CIRCUIT AND METHOD OF FABRICATION THEREOF

INTEGRATED CIRCUIT SYSTEM WITH VIA AND METHOD OF MANUFACTURE THEREOF

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING AN EPITAXIAL C...

INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...

TEST CHIPLETS FOR DEVICES

DEFECT DETECTION RECIPE DEFINITION

RELIABLE INTERCONNECT FOR SEMICONDUCTOR DEVICE

DEFECT MONITORING IN SEMICONDUCTOR DEVICE FABRICATION

RELIABLE INTERCONNECTS

STRAINED CHANNEL TRANSISTOR STRUCTURE AND METHOD

NESTED AND ISOLATED TRANSISTORS WITH REDUCED IMPEDANCE DIFFERENCE

INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...

METHOD FOR REDUCING SILICIDE DEFECTS IN INTEGRATED CIRCUITS

MASK AND METHOD TO PATTERN CHROMELESS PHASE LITHOGRAPHY CONTACT HOLE

INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED LAYERS

INTEGRATED CIRCUIT SYSTEM EMPLOYING BACKSIDE ENERGY SOURCE FOR ELEC...

Spacer-less Low-K Dielectric Processes

RELIABLE INTERCONNECTS

Method and apparatus to reduce thermal variations within an integra...

INTEGRATED CIRCUIT SYSTEM EMPLOYING SINGLE MASK LAYER TECHNIQUE FOR...

Implantation for shallow trench isolation (STI) formation and for s...

METHOD FOR REDUCING SILICIDE DEFECTS IN INTEGRATED CIRCUITS