Lie-Szu Juang

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system for determining equivalence of design rule manual...
- Patent number 11,842,133
- Issue date Dec 12, 2023
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chin-Chou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for determining equivalence of design rule manual...
- Patent number 11,120,186
- Issue date Sep 14, 2021
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chin-Chou Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design in optical shrink technology node
- Patent number 8,671,367
- Issue date Mar 11, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chung-Hsing Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for non-shrinkable IP integration
- Patent number 8,504,965
- Issue date Aug 6, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hung-Yi Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Design flow for shrinking circuits having non-shrinkable IP layout
- Patent number 7,640,520
- Issue date Dec 29, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chung-Hsing Wang
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR DETERMINING EQUIVALENCE OF DESIGN RULE MANUAL...
- Publication number 20240012971
- Publication date Jan 11, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- CHIN-CHOU LIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR DETERMINING EQUIVALENCE OF DESIGN RULE MANUAL...
- Publication number 20210365621
- Publication date Nov 25, 2021
- Taiwan Semiconductor Manufacturing company Ltd.
- CHIN-CHOU LIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR DETERMINING EQUIVALENCE OF DESIGN RULE MANUAL...
- Publication number 20210097222
- Publication date Apr 1, 2021
- Taiwan Semiconductor Manufacturing company Ltd.
- CHIN-CHOU LIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design Method for Non-Shrinkable IP Integration
- Publication number 20120084745
- Publication date Apr 5, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hung-Yi Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DESIGN IN OPTICAL SHRINK TECHNOLOGY NODE
- Publication number 20090326873
- Publication date Dec 31, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chung-Hsing Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design flow for shrinking circuits having non-shrinkable IP layout
- Publication number 20080229259
- Publication date Sep 18, 2008
- Chung-Hsing Wang
- G06 - COMPUTING CALCULATING COUNTING

Lie-Szu Juang

Person

Patents Grantslast 30 patents

Method and system for determining equivalence of design rule manual...

Method and system for determining equivalence of design rule manual...

Integrated circuit design in optical shrink technology node

Method for non-shrinkable IP integration

Design flow for shrinking circuits having non-shrinkable IP layout

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR DETERMINING EQUIVALENCE OF DESIGN RULE MANUAL...

METHOD AND SYSTEM FOR DETERMINING EQUIVALENCE OF DESIGN RULE MANUAL...

METHOD AND SYSTEM FOR DETERMINING EQUIVALENCE OF DESIGN RULE MANUAL...

Design Method for Non-Shrinkable IP Integration

INTEGRATED CIRCUIT DESIGN IN OPTICAL SHRINK TECHNOLOGY NODE

Design flow for shrinking circuits having non-shrinkable IP layout